Datasheet ADP151-EP (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | Ultralow Noise, 200 mA, CMOS Linear Regulator |
| 页数 / 页 | 16 / 4 — ADP151-EP. Enhanced Product. Parameter. Symbol. Conditions. Min. Typ. … |
| 文件格式/大小 | PDF / 341 Kb |
| 文件语言 | 英语 |
ADP151-EP. Enhanced Product. Parameter. Symbol. Conditions. Min. Typ. Max. Unit. INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
该数据表的模型线
- ADP151ACBZ-1.1-R7 ADP151ACBZ-1.2-R7 ADP151ACBZ-1.5-R7 ADP151ACBZ-1.8-R7 ADP151ACBZ-2.1-R7 ADP151ACBZ-2.5-R7 ADP151ACBZ-2.6-R7 ADP151ACBZ-2.75-R7 ADP151ACBZ-2.8-R7 ADP151ACBZ-2.85-R7 ADP151ACBZ-3.0-R7 ADP151ACBZ-3.3-R7 ADP151ACPZ-1.2-R7 ADP151ACPZ-1.5-R7 ADP151ACPZ-1.8-R7 ADP151ACPZ-2.5-R7 ADP151ACPZ-2.7-R7 ADP151ACPZ-2.8-R7 ADP151ACPZ-3.0-R7 ADP151ACPZ-3.3-R7 ADP151AUJZ-1.2-R7 ADP151AUJZ-1.5-R7 ADP151AUJZ-1.8-R7 ADP151AUJZ-2.5-R7 ADP151AUJZ-2.8-R7 ADP151AUJZ-2.9-R7 ADP151AUJZ-3.0-R7 ADP151AUJZ-3.3-R7 ADP151TUJZ3.3-EPR2 ADP151WACBZ-1.1-R7 ADP151WACBZ-1.2-R7 ADP151WACBZ-1.5-R7 ADP151WACBZ-1.8-R7 ADP151WACBZ-2.1-R7 ADP151WACBZ-2.5-R7 ADP151WACBZ-2.6-R7 ADP151WACBZ-2.75-R7 ADP151WACBZ-2.8-R7 ADP151WACBZ-2.85-R7 ADP151WACBZ-3.0-R7 ADP151WACBZ-3.3-R7
文件文字版本
link to page 7 link to page 4
ADP151-EP Enhanced Product Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY REJECTION RATIO PSRR V = V + 0.5 V 10 kHz, V = 3.8 V, V = 3.3 V, I = 10 mA 70 dB IN OUT IN OUT OUT 100 kHz, V = 3.8 V, V = 3.3 V, I = 10 mA 55 dB IN OUT OUT V = V + 1 V 10 kHz, V = 4.3 V, V = 3.3 V, I = 10 mA 70 dB IN OUT IN OUT OUT 100 kHz, V = 4.3 V, V = 3.3 V, I = 10 mA 55 dB IN OUT OUT 10 kHz, V = 2.2 V, V = 1.1 V, I = 10 mA 70 dB IN OUT OUT 100 kHz, V = 2.2 V, V = 1.1 V, I = 10 mA 55 dB IN OUT OUT 1 Based on an end-point calculation using 0.1 mA and 200 mA loads. See Figure 4 for typical load regulation performance for loads less than 1 mA. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.2 V. 3 Start-up time is defined as the time between the rising edge of EN and VOUT being at 90% of its nominal value. 4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V (that is, 2.7 V).
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Conditions Min Typ Max Unit
Minimum Input and Output Capacitance1 C T = −55°C to +125°C 0.7 µF MIN A Capacitor ESR R T = −55°C to +125°C 0.001 0.2 Ω ESR A 1 The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The ful range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. 0 | Page 4 of 16 Document Outline Features Applications Typical Application Circuit General Description Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Applications Information Thermal Considerations Printed Circuit Board Layout Considerations Outline Dimensions Ordering Guide
ADP151-EP Enhanced Product Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY REJECTION RATIO PSRR V = V + 0.5 V 10 kHz, V = 3.8 V, V = 3.3 V, I = 10 mA 70 dB IN OUT IN OUT OUT 100 kHz, V = 3.8 V, V = 3.3 V, I = 10 mA 55 dB IN OUT OUT V = V + 1 V 10 kHz, V = 4.3 V, V = 3.3 V, I = 10 mA 70 dB IN OUT IN OUT OUT 100 kHz, V = 4.3 V, V = 3.3 V, I = 10 mA 55 dB IN OUT OUT 10 kHz, V = 2.2 V, V = 1.1 V, I = 10 mA 70 dB IN OUT OUT 100 kHz, V = 2.2 V, V = 1.1 V, I = 10 mA 55 dB IN OUT OUT 1 Based on an end-point calculation using 0.1 mA and 200 mA loads. See Figure 4 for typical load regulation performance for loads less than 1 mA. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.2 V. 3 Start-up time is defined as the time between the rising edge of EN and VOUT being at 90% of its nominal value. 4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V (that is, 2.7 V).
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Conditions Min Typ Max Unit
Minimum Input and Output Capacitance1 C T = −55°C to +125°C 0.7 µF MIN A Capacitor ESR R T = −55°C to +125°C 0.001 0.2 Ω ESR A 1 The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The ful range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. 0 | Page 4 of 16 Document Outline Features Applications Typical Application Circuit General Description Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Applications Information Thermal Considerations Printed Circuit Board Layout Considerations Outline Dimensions Ordering Guide