link to page 1 link to page 9 Data SheetAD532FUNCTIONAL DESCRIPTION The functional block diagram for the AD532 is shown in Figure 1 The product of the two inputs is resolved in the multiplier cel and the complete schematic in Figure 13. In the multiplying and using Gilbert’s linearized transconductance technique. The cell squaring modes, Z is connected to the output to close the feedback is laser trimmed to obtain VOUT = (X1 − X2)(Y1 − Y2)/10 V. The around the output op amp. In the divide mode, it is used as an built in op amp is used to obtain low output impedance and make input terminal. possible self contained operation. The residual output voltage offset The X and Y inputs are fed to high impedance differential can be zeroed at VOS in critical applications. Otherwise, the VOS pin amplifiers featuring low distortion and good common-mode should be grounded. rejection. The amplifier voltage offsets are actively laser trimmed to zero during production. X2+VSR2R6R8R16R23R27ZQ1Q2C1Q7 Q8Q14 Q15Q16 Q17Q21R33Q25R34R20R22R9VOSY1Q9Q10R1R30XR131Q3Q4R21R31R3Q22 Q26R28COMOUTPUTR10Q18Q23R29Q5Q6Q11Q12Q24Q27R19R32R11Q20R14Q19Q28Q13R4R5R12R15R24R25R26–V 004 R18S CANY2 00502- Figure 13. Schematic Diagram Rev. E | Page 9 of 14 Document Outline Features Applications General Description Flexibility of Operation Functional Block Diagram Guaranteed Performance Over Temperature Advantages of On The Chip Trimming of The Monolithic AD532 Revision History Specifications Thermal Resistance Chip Dimensions And Bonding Diagram ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Description AD532 Performance Characteristics Nonlinearity AC Feedthrough Common-Mode Rejection Dynamic Characteristics Power Supply Considerations Noise Characteristics Applications Replacing Other IC Multipliers Multiplication Squaring Division Square Root Additional Information Outline Dimensions Ordering Guide