Datasheet AD8226 (Analog Devices) - 9

Data Sheet AD8226 TYPICAL PERFORMANCE CHARACTERISTICS
T = 25°C, VS = ±15 V, RL = 10 kΩ, unless otherwise noted.
N: 2203 MEAN: 0.041 160 MEAN: 35.7649 250 SD: 0.224 SD: 229.378 140 200 120 100 S 150 S T T HI 80 HI 100 60 40 50 20 0
1
0
4
–900 –600 –300 0 300 600 900
03 03 6-
–1.2 –0.9 –0.6 –0.3 0 0.3 0.6 0.9 1.2
6-
V
03 03
OSO @ ±15V (µV) V
07
OSI DRIFT (µV)
07 Figure 3. Typical Distribution of Output Offset Voltage Figure 6. Typical Distribution of Input Offset Voltage Drift, G = 100
240 MEAN: –0.57 180 MEAN: 21.5589 SD: 1.5762 SD: 0.624 210 150 180 120 150 S T S T HI 120 90 HI 90 60 60 30 30 0
32
0
5
–9 –6 –3 0 3 6 9
0 03 6-
18 20 22 24 26
6-
V
03 03
OSO DRIFT (µV)
07
POSITIVE IBIAS CURRENT @ ±15V (nA)
07 Figure 4. Typical Distribution of Output Offset Voltage Drift Figure 7. Typical Distribution of Input Bias Current
350 MEAN: –3.67283 MEAN: 0.003 SD: 51.1 300 SD: 0.075 300 250 250 200 200 S S T T HI HI 150 150 100 100 50 50 0
3
0
6
–400 –200 0 200 400
03 03 6-
–0.9 –0.6 –0.3 0 0.3 0.6 0.9
6-
V
03 03
OSI @ RG PINS @ ±15V (µV) V
07
OSI @ ±15V (nA)
07 Figure 5. Typical Distribution of Input Offset Voltage Figure 8. Typical Distribution of Input Offset Current Rev. D | Page 9 of 28 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL INPUT VOLTAGE RANGE Performance Across Temperature Recommendation for Best Performance LAYOUT Common-Mode Rejection Ratio Over Frequency Power Supplies References INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION DIFFERENTIAL DRIVE Tips for Best Differential Output Performance PRECISION STRAIN GAGE DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE