Datasheet BUK9V13-40H (Nexperia) - 8
| 制造商 | Nexperia |
| 描述 | Dual N-channel 40 V, 13 mOhm logic level MOSFET in LFPAK56D (half-bridge configuration) |
| 页数 / 页 | 13 / 8 — Nexperia. BUK9V13-40H. Dual N-channel 40 V, 13 mOhm logic level MOSFET in … |
| 修订版 | 11022021 |
| 文件格式/大小 | PDF / 313 Kb |
| 文件语言 | 英语 |
Nexperia. BUK9V13-40H. Dual N-channel 40 V, 13 mOhm logic level MOSFET in LFPAK56D (half-bridge configuration)
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Nexperia BUK9V13-40H Dual N-channel 40 V, 13 mOhm logic level MOSFET in LFPAK56D (half-bridge configuration)
aaa-029503 3 aaa-032347 80 VGS( S t(h) h RD R S D o S n o (V) V (m ( Ω m ) 2. 2 8 8 V 3 3 V 2.5 64 Max a 2 48 Ty T p y 1.5 Min 32 3. 3 5 . 5 V 1 4. 4 5 . 5 V 16 0.5 VGS = 1 0 1 0 V 0 0 -60 -30 0 30 60 90 120 150 180 0 6 12 18 24 30 36 Tj (°C) ID (A) ID = 1 mA ; VDS = VGS Tj = 25 °C
Fig. 10. Gate-source threshold voltage as a function of Fig. 11. Drain-source on-state resistance as a function junction temperature, FET1 and FET2 of drain current; typical values, FET1 and FET2
aaa-029504 2 aaa-032348 10 a VGS (V ( ) V 1.7 8 VGS S = = 4. 4 5 5 V 1.4 6 10 1 0 V 32 3 2 V 1.1 4 VDS = = 14 1 4 V 0.8 2 0.5 0 -60 -30 0 30 60 90 120 150 180 0 4 8 12 16 20 Tj (°C) QG (nC) Tj = 25 °C; ID = 10 A
Fig. 13. Gate-source voltage as a function of gate Fig. 12. Normalized drain-source on-state resistance charge; typical values, FET1 and FET2 factor as a function of junction temperature, FET1 and FET2
BUK9V13-40H All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. Al rights reserved
Product data sheet 11 February 2021 8 / 13
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Quick reference data 5. Pinning information 6. Ordering information 7. Marking 8. Limiting values 9. Thermal characteristics 10. Characteristics 11. Package outline 12. Soldering 13. Legal information Contents
aaa-029503 3 aaa-032347 80 VGS( S t(h) h RD R S D o S n o (V) V (m ( Ω m ) 2. 2 8 8 V 3 3 V 2.5 64 Max a 2 48 Ty T p y 1.5 Min 32 3. 3 5 . 5 V 1 4. 4 5 . 5 V 16 0.5 VGS = 1 0 1 0 V 0 0 -60 -30 0 30 60 90 120 150 180 0 6 12 18 24 30 36 Tj (°C) ID (A) ID = 1 mA ; VDS = VGS Tj = 25 °C
Fig. 10. Gate-source threshold voltage as a function of Fig. 11. Drain-source on-state resistance as a function junction temperature, FET1 and FET2 of drain current; typical values, FET1 and FET2
aaa-029504 2 aaa-032348 10 a VGS (V ( ) V 1.7 8 VGS S = = 4. 4 5 5 V 1.4 6 10 1 0 V 32 3 2 V 1.1 4 VDS = = 14 1 4 V 0.8 2 0.5 0 -60 -30 0 30 60 90 120 150 180 0 4 8 12 16 20 Tj (°C) QG (nC) Tj = 25 °C; ID = 10 A
Fig. 13. Gate-source voltage as a function of gate Fig. 12. Normalized drain-source on-state resistance charge; typical values, FET1 and FET2 factor as a function of junction temperature, FET1 and FET2
BUK9V13-40H All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. Al rights reserved
Product data sheet 11 February 2021 8 / 13
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Quick reference data 5. Pinning information 6. Ordering information 7. Marking 8. Limiting values 9. Thermal characteristics 10. Characteristics 11. Package outline 12. Soldering 13. Legal information Contents