Datasheet HMC1082CHIP (Analog Devices) - 6

HMC1082CHIP Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 2 3 4 VDD1 VDD2 VDD3 HMC1082CHIP TOP VIEW 1 RFIN (Not to Scale) RFOUT 5 VGG
002
6
20651- Figure 2. Pad Configuration
Table 6. Pad Function Descriptions Pin No. Mnemonic Description
1 RFIN RF Signal Input. This pad is dc-coupled and matched to 50 Ω. 2, 3, 4 VDD1, VDD2, VDD3 Drain Bias for the Amplifier. 5 RFOUT RF Signal Output. This pad is dc-coupled and matched to 50 Ω. 6 VGG Amplifier Gate Control. Die Bottom GND Ground. Die bottom must be connected to RF and dc ground.
INTERFACE SCHEMATICS RFOUT RFIN 2.5kΩ
006
2.5kΩ
003 20651- 20651- Figure 3. RFIN Interface Schematic Figure 6. RFOUT Interface Schematic
VDD1, VDD2, VDD3 GND
007 004 20651- 20651- Figure 4. VDD1, VDD2, and VDD3 Interface Schematic Figure 7. GND Interface Schematic 005
VGG
20651- Figure 5. VGG Interface Schematic Rev. B | Page 6 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 5.5 GHz TO 7 GHz FREQUENCY RANGE 7 GHz TO 15.5 GHz FREQUENCY RANGE 15.5 GHz TO 18 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCING MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions APPLICATION CIRCUIT ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE