Datasheet HMC1114 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 10 W, GaN Power Amplifier, 2.7 GHz to 3.8 GHz |
| 页数 / 页 | 15 / 3 — Data Sheet. HMC1114. SPECIFICATIONS ELECTRICAL SPECIFICATIONS. Table 1. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 320 Kb |
| 文件语言 | 英语 |
Data Sheet. HMC1114. SPECIFICATIONS ELECTRICAL SPECIFICATIONS. Table 1. Parameter. Symbol Min Typ
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Data Sheet HMC1114 SPECIFICATIONS ELECTRICAL SPECIFICATIONS
TA = 25°C, VDD = 28 V, IDQ = 150 mA, frequency range = 2.7 GHz to 3.2 GHz, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 2.7 3.2 GHz GAIN Small Signal Gain 32 35 dB Gain Flatness ±0.5 dB Power Gain for 4 dB Compression 29 dB Power Gain for Saturated Output Power 25.5 dB Measurement taken at PIN = 16 dBm RETURN LOSS Input 14 dB Output 11 dB POWER Output Power for 4 dB Compression P4dB 39 dBm Saturated Output Power PSAT 41.5 dBm Measurement taken at PIN = 16 dBm Power Added Efficiency PAE 54 % OUTPUT THIRD-ORDER INTERCEPT IP3 44 Measurement taken at POUT/tone = 30 dBm TARGET QUIESCENT CURRENT IDQ 150 mA Adjust the gate control voltage (VGG1, VGG2) between −8 V and 0 V to achieve an IDQ = 150 mA typical TA = 25°C, VDD = 28 V, IDQ = 150 mA, frequency range = 3.2 GHz to 3.8 GHz, unless otherwise noted.
Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 3.2 3.8 GHz GAIN Small Signal Gain 29 32 dB Gain Flatness ±1 dB Power Gain for 4 dB Compression 28 dB Power Gain for Saturated Output Power 25 dB Measurement taken at PIN = 16 dBm RETURN LOSS Input 25 dB Output 9 dB POWER Output Power for 4 dB Compression P4dB 40 dBm Saturated Output Power PSAT 40.5 dBm Measurement taken at PIN = 16 dBm Power Added Efficiency PAE 53 % OUTPUT THIRD-ORDER INTERCEPT IP3 44 Measurement taken at POUT/tone = 30 dBm TARGET QUIESCENT CURRENT IDQ 150 mA Adjust the gate control voltage (VGG1, VGG2) between −8 V and 0 V to achieve an IDQ = 150 mA typical
TOTAL SUPPLY CURRENT BY VDD Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
SUPPLY CURRENT IDQ Adjust VGG1, VGG2 to achieve an IDQ = 150 mA typical VDD = 25 V 150 mA VDD = 28 V 150 mA VDD = 32 V 150 mA Rev. A | Page 3 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS TOTAL SUPPLY CURRENT BY VDD ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCE During Power-Up During Power-Down TYPICAL APPLICATION CIRCUIT EVALUATION PRINTED CIRCUIT BOARD (PCB) BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE
TA = 25°C, VDD = 28 V, IDQ = 150 mA, frequency range = 2.7 GHz to 3.2 GHz, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 2.7 3.2 GHz GAIN Small Signal Gain 32 35 dB Gain Flatness ±0.5 dB Power Gain for 4 dB Compression 29 dB Power Gain for Saturated Output Power 25.5 dB Measurement taken at PIN = 16 dBm RETURN LOSS Input 14 dB Output 11 dB POWER Output Power for 4 dB Compression P4dB 39 dBm Saturated Output Power PSAT 41.5 dBm Measurement taken at PIN = 16 dBm Power Added Efficiency PAE 54 % OUTPUT THIRD-ORDER INTERCEPT IP3 44 Measurement taken at POUT/tone = 30 dBm TARGET QUIESCENT CURRENT IDQ 150 mA Adjust the gate control voltage (VGG1, VGG2) between −8 V and 0 V to achieve an IDQ = 150 mA typical TA = 25°C, VDD = 28 V, IDQ = 150 mA, frequency range = 3.2 GHz to 3.8 GHz, unless otherwise noted.
Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 3.2 3.8 GHz GAIN Small Signal Gain 29 32 dB Gain Flatness ±1 dB Power Gain for 4 dB Compression 28 dB Power Gain for Saturated Output Power 25 dB Measurement taken at PIN = 16 dBm RETURN LOSS Input 25 dB Output 9 dB POWER Output Power for 4 dB Compression P4dB 40 dBm Saturated Output Power PSAT 40.5 dBm Measurement taken at PIN = 16 dBm Power Added Efficiency PAE 53 % OUTPUT THIRD-ORDER INTERCEPT IP3 44 Measurement taken at POUT/tone = 30 dBm TARGET QUIESCENT CURRENT IDQ 150 mA Adjust the gate control voltage (VGG1, VGG2) between −8 V and 0 V to achieve an IDQ = 150 mA typical
TOTAL SUPPLY CURRENT BY VDD Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
SUPPLY CURRENT IDQ Adjust VGG1, VGG2 to achieve an IDQ = 150 mA typical VDD = 25 V 150 mA VDD = 28 V 150 mA VDD = 32 V 150 mA Rev. A | Page 3 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS TOTAL SUPPLY CURRENT BY VDD ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCE During Power-Up During Power-Down TYPICAL APPLICATION CIRCUIT EVALUATION PRINTED CIRCUIT BOARD (PCB) BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE