Datasheet HMC637ALP5E (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | GaAs, pHEMT, MMIC, 1 W Power Amplifier, 0.1 GHz to 6 GHz |
| 页数 / 页 | 11 / 5 — Data Sheet. HMC637ALP5E. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 269 Kb |
| 文件语言 | 英语 |
Data Sheet. HMC637ALP5E. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. ACG. NIC 1. 24 NIC. VGG2 2. 23 NIC. NIC 3. GND. GND 4. TOP VIEW
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Data Sheet HMC637ALP5E PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 C C C C C C NI NI ACG ACG NI NI NI NI 32 31 30 29 28 27 26 25 NIC 1 24 NIC VGG2 2 23 NIC NIC 3 22 HMC637ALP5E GND GND 4 21 TOP VIEW RFOUT/VDD RFIN 5 (Not to Scale) 20 NIC NIC 6 19 NIC NIC 7 18 NIC NIC 8 17 NIC 9 10 11 12 13 14 15 16 C C C D C 4 3 NI NI NI GN GG1 NI V ACG ACG NOTES 1. NIC = NO INTERNAL CONNECTION. THESE PINS MAY BE CONNECTED TO
002
RF GROUND. PERFORMANCE IS NOT AFFECTED.
08-
2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO RF/DC GROUND.
173 Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description1
1, 3, 6 to 11, 14, 17 to 20, 23 to 28, 31, 32 NIC No Internal Connection. These pins may be connected to RF ground. Performance is not affected. 2 VGG2 Gate Control 2 for Amplifier. Apply 5 V to VGG2 for nominal operation. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 4, 12, 22 GND Ground. Connect Pin 4, Pin 12, and Pin 22 to RF/dc ground. 5 RFIN This pad is dc-coupled and matched to 50 Ω. 13 VGG1 Gate Control 1 for Amplifier. Attach a bypass capacitor per the application circuit shown in the Applications Information section. Follow the power up and power down sequences outlines in the Applications Information section. 15 ACG4 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 16 ACG3 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 21 RFOUT/VDD RF Output/Power Supply Voltage for Amplifier. Connect the dc bias (VDD) network to provide drain current (IDD). See the application circuit shown in the Applications Information section. 29 ACG2 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 30 ACG1 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. EPAD Exposed Pad. The exposed pad must be connected to RF/dc ground. 1 See the Interface Schematics section for pin interfaces. Rev. C | Page 5 of 11 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Applications Information Evaluation PCB List of Materials for PCB EV1HMC637ALP5E Outline Dimensions Ordering Guide
Data Sheet HMC637ALP5E PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 C C C C C C NI NI ACG ACG NI NI NI NI 32 31 30 29 28 27 26 25 NIC 1 24 NIC VGG2 2 23 NIC NIC 3 22 HMC637ALP5E GND GND 4 21 TOP VIEW RFOUT/VDD RFIN 5 (Not to Scale) 20 NIC NIC 6 19 NIC NIC 7 18 NIC NIC 8 17 NIC 9 10 11 12 13 14 15 16 C C C D C 4 3 NI NI NI GN GG1 NI V ACG ACG NOTES 1. NIC = NO INTERNAL CONNECTION. THESE PINS MAY BE CONNECTED TO
002
RF GROUND. PERFORMANCE IS NOT AFFECTED.
08-
2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO RF/DC GROUND.
173 Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description1
1, 3, 6 to 11, 14, 17 to 20, 23 to 28, 31, 32 NIC No Internal Connection. These pins may be connected to RF ground. Performance is not affected. 2 VGG2 Gate Control 2 for Amplifier. Apply 5 V to VGG2 for nominal operation. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 4, 12, 22 GND Ground. Connect Pin 4, Pin 12, and Pin 22 to RF/dc ground. 5 RFIN This pad is dc-coupled and matched to 50 Ω. 13 VGG1 Gate Control 1 for Amplifier. Attach a bypass capacitor per the application circuit shown in the Applications Information section. Follow the power up and power down sequences outlines in the Applications Information section. 15 ACG4 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 16 ACG3 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 21 RFOUT/VDD RF Output/Power Supply Voltage for Amplifier. Connect the dc bias (VDD) network to provide drain current (IDD). See the application circuit shown in the Applications Information section. 29 ACG2 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 30 ACG1 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. EPAD Exposed Pad. The exposed pad must be connected to RF/dc ground. 1 See the Interface Schematics section for pin interfaces. Rev. C | Page 5 of 11 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Applications Information Evaluation PCB List of Materials for PCB EV1HMC637ALP5E Outline Dimensions Ordering Guide