Datasheet HMC980LP4E (Analog Devices) - 10

HMC980LP4E
v01.0911
ACTIVE BIAS CONTROLLER HIGH CURRENT Pin Descriptions
(Continued) Pin Number Function Description Interface Schematic T Feedback (Control) pin for Negative Voltage Generator Charge Pump. Float to activate the negative voltage 11 VNEGFB M generator / Short to GND to disable the negative voltage generator. T - S Control pin for VGATEFB. Float VGATEFB when a 12 VGATEFB depletion mode transistor is biased. Selects the mode N of operation along with VNEGFB pin. E M E Control voltage of the second gate pin VG2. Use a 13 VG2_CONT resistor divider between VDD and GND to set the volt- G age. VG2 is typically 1.3V lower than the VG2CONT A N A R M 14 VG2 Second gate control. E W O Negative input to the chip. Should be supplied with CPOUT when negative voltage generator is enabled, or 15 VNEG connect to external VSS when negative voltage genera- C P tor is enabled. Defaults to -2.5V. If a value different than D -2.5V required, please contact factory. Gate Control pin for external amplifier. Connect to the gate (base) of the external amplifier. In order to guar- 16 VGATE antee stability, a 2.2μF capacitor should be connected between the gate (base) terminal of the external ampli- fier and GND as close to the amplifier as possible. Drain voltage. Should be connected to the supply termi- nal of the external amplifier. A minimum 10 nF capacitor 17, 18 VDRAIN has to be placed close to the external amplifier to improve load regulation. For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373
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Order On-line at www.hittite.com Document Outline Typical Applications Features Functional Diagram General Description Electrical Specifications Typical Performance Characteristics Bias Current Accuracy[1] Bias Current Accuracy[2] Power Up Waveform Shutdown Waveform Enable Waveform Disable Waveform Load Regulation @ VDD=5V, VDIG=3.3V, SW0=GND, SW1=GND Load Regulation @ VDD=5V, VDIG=3.3V, SW0=3.3V, SW1=GND Load Regulation @ VDD=16.5V, VDIG=5.0V, SW0=GND, SW1=VDIG Load Regulation @ VDD=16.5V, VDIG=5.0V, SW0=VDIG, SW1=VDIG VNEG Load Regulation @ VDD=5V VNEG Load Regulation @ VDD=16.5V VNEG Load Transient VDD=5V VNEG Load Transient VDD=16.5V VGATE Load Regulation @ VDD=12V [1] VG2 Load Regulation @ VDD=12V [2] VNEG Line Regulation vs. Supply Voltage Absolute Maximum Ratings Outline Drawing Package Information Pin Descriptions Evaluation Board Circuit Evaluation PCB List of Materials for Evaluation PCB Application Notes Detailed Description Digital Power Supply (VDIG) Supply and Drain Voltage (VDD and VDRAIN) Table 1. REcommended Current Range Configuration Negative Voltage Generator (VNEGOUT) Enable/Disable (EN) Active Bias Control Loop VG2 Voltage Adjustment Self Protection Feature VNEG Fault Detection Feature Over/Under Current Alarm Power-up and Enable Sequencing Daisy-Chain Operation Operation Modes Table 2 - The List of Bias Settings for Various Hittite Amplifiers Table 3 - List of Bias Settings for Various Hittite Amplifiers