Datasheet ADRF5547 (Analog Devices)

Dual-Channel, 3.7 GHz to 5.3 GHz, Receiver Front End Data Sheet ADRF5547 FEATURES FUNCTIONAL BLOCK DIAGRAM Integrated dual-channel RF front end ADRF5547 2-stage LNA and high power SPDT switch A A h A On-chip bias and matching Ch Ch M-C Single-supply operation C C ND ER ND ND ND DD1- C DD2- G T NI G G G V NI NI V Gain 40 39 38 37 36 35 34 33 32 31 High gain mode: 33 dB typical at 4.6 GHz Low gain mode: 18 dB typical at 4.6 GHz GND 1 30 GND GND 2 29 RxOUT-ChA Low noise figure ANT-ChA 3 28 GND GND 4 27 BP-ChA High gain mode: 1.6 dB typical at 4.6 GHz SWCTRL-ChAB 5 26 PD-ChAB SWVDD-ChAB 6 25 NIC Low gain mode: 1.6 dB typical at 4.6 GHz GND 7 24 BP-ChB ANT-ChB 8 23 GND High channel to channel isolation GND 9 22 RxOUT-ChB GND 10 21 GND Between RxOUT-ChA and RxOUT-ChB: 45 dB typical Between TERM-ChA and TERM-ChB: 53 dB typical 11 12 13 14 15 16 17 18 19 20 Low insertion loss: 0.50 dB typical at 4.6 GHz B C B C C B ND h NI ND ND ND NI NI G G G G Ch Ch High power handling at TCASE = 105°C M-C
001
Full lifetime ER DD1- DD2- T V V
20790-
LTE average power (9 dB PAR): 40 dBm
Figure 1.
Single event (<10 sec operation) LTE average power (9 dB PAR): 43 dBm High OIP3: 31 dBm typical Power-down mode and low gain mode for LNA Low supply current High gain mode: 86 mA typical at 5 V Low gain mode: 36 mA typical at 5 V Power-down mode: 12 mA typical at 5 V Positive logic control 40-lead, 6 mm × 6 mm LFCSP APPLICATIONS Wireless infrastructure TDD massive multiple input and multiple output (MIMO) and active antenna systems TDD-based communication systems
In low gain mode, one stage of the two-stage LNAs is in bypass,
GENERAL DESCRIPTION
providing 18 dB gain at lower current of 36 mA. In power-down The ADRF5547 is a dual-channel, integrated RF, front end mode, the LNAs are turned off and the device draws 12 mA. multichip module designed for time division duplexing (TDD) In transmit operation, when RF inputs are connected to a applications that operates from 3.7 GHz to 5.3 GHz. The termination pin (TERM-ChA or TERM-ChB), the switch ADRF5547 is configured in dual channels with a cascading provides a low insertion loss of 0.50 dB and handles long term two-stage low noise amplifier (LNA) and a high power silicon, evolution (LTE) average power (9 dB peak to average ratio single-pole, double-throw (SPDT) switch. (PAR)) of 40 dBm for ful lifetime operation and 43 dBm for In high gain mode, the cascaded, two-stage LNA and switch single event (<10 sec) LNA protection operation. offer a low noise figure of 1.6 dB and high gain of 33 dB at The device comes in an RoHS compliant, compact, 40-lead, 4.6 GHz with an output third order intercept point (OIP3) of 6 mm × 6 mm LFCSP. 31 dBm (typical).
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS RECEIVE OPERATION, HIGH GAIN MODE RECEIVE OPERATION, LOW GAIN MODE TRANSMIT OPERATION THEORY OF OPERATION SIGNAL PATH SELECT Receive Operation BIASING SEQUENCE APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE