Datasheet AD5522 (Analog Devices) - 7

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Data Sheet AD5522 Parameter Min Typ1 Max Unit Test Conditions/Comments
Measure Current Ranges2 Specified current ranges are achieved with VREF = 5 V and MI gain = 10, or with VREF = 2.5 V and MI gain = 5 ±5 µA Set using internal sense resistor ±20 µA Set using internal sense resistor ±200 µA Set using internal sense resistor ±2 mA Set using internal sense resistor ±80 mA Set using external sense resistor; internal amplifier can drive up to ±80 mA Noise Spectral Density (NSD)2 400 nV/√Hz 1 kHz, MI amplifier only, inputs grounded FORCE CURRENT Voltage Compliance, FOHx2 AVSS + 4 AVDD − 4 V Voltage Compliance, EXTFOHx2 AVSS + 3 AVDD − 3 V Supports 64 mA sink current and 80 mA source current AVSS + 6 AVDD − 3 V Supports 80 mA sink and source current Offset Error −0.5 +0.5 % FSCR Measured at midscale code, 0 V, prior to calibration Offset Error Tempco2 5 ppm FS/°C Standard deviation = 5 ppm/°C Gain Error −1.5 +1.5 % FSCR Prior to calibration Gain Error Tempco2 −6 ppm/°C Standard deviation = 5 ppm/°C Linearity Error −0.02 +0.02 % FSCR Common-Mode Error (Gain = 5) −0.01 +0.01 % FSCR/V % of full-scale change per V change in DUT voltage Common-Mode Error (Gain = 10) −0.006 +0.006 % FSCR/V % of full-scale change per V change in DUT voltage Force Current Ranges Specified current ranges achieved with VREF = 5 V and MI gain = 10, or with VREF = 2.5 V and MI gain = 5 V ±5 µA Set using internal sense resistor, 200 kΩ ±20 µA Set using internal sense resistor, 50 kΩ ±200 µA Set using internal sense resistor, 5 kΩ ±2 mA Set using internal sense resistor, 500 Ω ±64 ±80 mA Set using external sense resistor, internal amplifier can drive up to ±80 mA with increased compliance MEASURE VOLTAGE Measure Voltage Range2 AVSS + 4 AVDD − 4 V Offset Error −10 +10 mV Gain = 1, measured at 0 V −25 +25 mV Gain = 0.2, measured at 0 V Offset Error Tempco2 −1 µV/°C Standard deviation = 6 µV/°C Gain Error −0.25 +0.25 % FSR MEASOUTx gain = 1 −0.5 +0.5 % FSR MEASOUTx gain = 0.2 Gain Error Tempco2 1 ppm/°C Standard deviation = 4 ppm/°C Linearity Error (MEASOUTx Gain = 1) −0.01 +0.01 % FSR Linearity Error (MEASOUTx Gain = 0.2) −0.01 +0.01 % FSR AVDD = 15.25 V, AVSS = −15.25 V, offset DAC = 0xA492 −0.06 +0.06 % FSR AVDD = 28 V, AVSS = −5 V, offset DAC = 0x0 −0.1 +0.1 % FSR AVDD = −10 V, AVSS = −23 V, offset DAC = 0x3640 Noise Spectral Density (NSD)2 100 nV/√Hz 1 kHz; measure voltage amplifier only, inputs grounded OFFSET DAC Span Error ±30 mV COMPARATOR Comparator Span 22.5 V Offset Error −2 +1 +2 mV Measured directly at comparator; does not include measure block errors Offset Error Tempco2 1 µV/°C Standard deviation = 2 µV/°C Propagation Delay2 0.25 μs VOLTAGE CLAMPS Clamp Span 22.5 V Positive Clamp Accuracy 155 mV Negative Clamp Accuracy −155 mV CLL to CLH2 500 mV CLL < CLH and minimum voltage apart Recovery Time2 0.5 1.5 μs Activation Time2 1.5 3 μs Rev. F | Page 7 of 64 Document Outline Features Applications Functional Block Diagram Revision History General Description Specifications Timing Characteristics Circuit and Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Force Amplifier Comparators Clamps Current Range Selection High Current Ranges Measure Current Gains VMID Voltage Choosing Power Supply Rails Measure Output (MEASOUTx Pins) Device Under Test Ground (DUTGND) Guard Amplifier Compensation Capacitors System Force and Sense Switches Temperature Sensor DAC Levels Offset DAC Gain and Offset Registers Cached X2 Registers Gain and Offset Registers for the FIN DAC Gain and Offset Registers for the Comparator DACs Gain and Offset Registers for the Clamp DACs Reference Voltage (VREF) Reference Selection Reference Selection Example Calibration Reducing Zero-Scale Error Reducing Gain Error Calibration Example Additional Calibration System Level Calibration Circuit Operation Force Voltage (FV) Mode Force Current (FI) Mode Serial Interface SPI Interface LVDS Interface Serial Interface Write Mode RESETB Function BUSYB and LOADB Functions Register Update Rates Register Selection Readback Control, RD/WRB PMU Address Bits: PMU3, PMU2, PMU1, PMU0 NOP (No Operation) Reserved Commands Write System Control Register Write PMU Register Write DAC Register DAC Addressing Read Registers Readback of System Control Register Readback of PMU Register Readback of Comparator Status Register Readback of Alarm Status Register Readback of DAC Register Applications Information Power-On Default Setting Up the Device on Power-On Changing Modes Required External Components Power Supply Decoupling Power Supply Sequencing Typical Application for the AD5522 Outline Dimensions Ordering Guide