Datasheet STGAP2SICS (STMicroelectronics) - 5
| 制造商 | STMicroelectronics |
| 描述 | Galvanically isolated 4 A single gate driver for SiC MOSFETs |
| 页数 / 页 | 24 / 5 — STGAP2SICS. Electrical characteristics |
| 文件格式/大小 | PDF / 567 Kb |
| 文件语言 | 英语 |
STGAP2SICS. Electrical characteristics
该数据表的模型线
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STGAP2SICS Electrical characteristics 4 Electrical characteristics Table 5. Electrical characteristics (TJ = 25°C, VH = 15 V, VDD = 5 V unless otherwise specified) Symbol Pin Parameter Test conditions Min. Typ. Max. Unit Dynamic charact eristics
t Input to output propagation Don IN+, IN- - 50 75 90 ns delay ON t Input to output propagation Doff IN+, IN- - 50 75 90 ns delay OFF tr - Rise time CL = 4.7 nF - 30 - ns t See Figure 1 f - Fall time - 30 - ns Pulse Width Distortion PWD - - - - 20 ns |tDon-tDoff| tdeglitch IN+, IN- Inputs deglitch filter - - 20 40 ns Common-mode transient VCM = 1500 V, CMTI (1) - 100 - - V/ns immunity, |dVISO/dt| See Figure 2
Supply voltage
VHon - VH UVLO turn-on threshold - 14.6 15.5 16.4 V VHoff - VH UVLO turn-off threshold - 13.9 14.8 15.7 V VHhyst - VH UVLO hysteresis - 600 750 950 mV I VH undervoltage quiescent QHU - VH = 7V - 1.3 1.8 mA supply current IQH - VH quiescent supply current - - 1.3 1.8 mA I Standby VH quiescent supply QHSBY - Standby mode - 400 550 µA current IGOFF = 0.2 A; SafeClp - GOFF active clamp - 2 2.3 V VH floating IQDD - VDD quiescent supply current - - 1.0 1.3 mA I Standby VDD quiescent QDDSBY - Standby mode - 40 65 µA supply current
Logic Inputs
V Low level logic threshold il IN+, IN- - 0.29·VDD 0.33·VDD 0.37·VDD V voltage V High level logic threshold ih IN+, IN- - 0.62·VDD 0.66·VDD 0.70·VDD V voltage IINh IN+, IN- INx logic “1” input bias current INx = 5 V 33 50 70 µA IINl IN+, IN- INx logic “0” input bias current INx = GND - - 1 µA Rpd IN+, IN- Inputs pull-down resistors INx = 5 V 70 100 150 kΩ
Driver buffer section
TJ = 25°C - 4 - A IGON - Source short circuit current TJ = -40 to +125°C 3 - 5 A V Source output high level GONH - I voltage GON = 100 mA VH-0.15 VH-0.125 - V
DS13402
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Rev 1 page 5/24
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Pin description and connection diagram 3 Electrical data 3.1 Absolute maximum ratings 3.2 Thermal data 3.3 Recommended operating conditions 4 Electrical characteristics 5 Isolation 6 Functional description 6.1 Gate driving power supply and UVLO 6.2 Power-up, power-down and “safe state” 6.3 Control inputs 6.4 Miller Clamp function 6.5 Watchdog 6.6 Thermal shutdown protection 6.7 Standby function 7 Typical application diagram 8 Layout 8.1 Layout guidelines and considerations 8.2 Layout example 9 Testing and characterization information 10 Package information 10.1 SO-8W package information 10.2 SO-8W suggested land pattern 11 Ordering information Revision history Contents List of tables List of figures
STGAP2SICS Electrical characteristics 4 Electrical characteristics Table 5. Electrical characteristics (TJ = 25°C, VH = 15 V, VDD = 5 V unless otherwise specified) Symbol Pin Parameter Test conditions Min. Typ. Max. Unit Dynamic charact eristics
t Input to output propagation Don IN+, IN- - 50 75 90 ns delay ON t Input to output propagation Doff IN+, IN- - 50 75 90 ns delay OFF tr - Rise time CL = 4.7 nF - 30 - ns t See Figure 1 f - Fall time - 30 - ns Pulse Width Distortion PWD - - - - 20 ns |tDon-tDoff| tdeglitch IN+, IN- Inputs deglitch filter - - 20 40 ns Common-mode transient VCM = 1500 V, CMTI (1) - 100 - - V/ns immunity, |dVISO/dt| See Figure 2
Supply voltage
VHon - VH UVLO turn-on threshold - 14.6 15.5 16.4 V VHoff - VH UVLO turn-off threshold - 13.9 14.8 15.7 V VHhyst - VH UVLO hysteresis - 600 750 950 mV I VH undervoltage quiescent QHU - VH = 7V - 1.3 1.8 mA supply current IQH - VH quiescent supply current - - 1.3 1.8 mA I Standby VH quiescent supply QHSBY - Standby mode - 400 550 µA current IGOFF = 0.2 A; SafeClp - GOFF active clamp - 2 2.3 V VH floating IQDD - VDD quiescent supply current - - 1.0 1.3 mA I Standby VDD quiescent QDDSBY - Standby mode - 40 65 µA supply current
Logic Inputs
V Low level logic threshold il IN+, IN- - 0.29·VDD 0.33·VDD 0.37·VDD V voltage V High level logic threshold ih IN+, IN- - 0.62·VDD 0.66·VDD 0.70·VDD V voltage IINh IN+, IN- INx logic “1” input bias current INx = 5 V 33 50 70 µA IINl IN+, IN- INx logic “0” input bias current INx = GND - - 1 µA Rpd IN+, IN- Inputs pull-down resistors INx = 5 V 70 100 150 kΩ
Driver buffer section
TJ = 25°C - 4 - A IGON - Source short circuit current TJ = -40 to +125°C 3 - 5 A V Source output high level GONH - I voltage GON = 100 mA VH-0.15 VH-0.125 - V
DS13402
-
Rev 1 page 5/24
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Pin description and connection diagram 3 Electrical data 3.1 Absolute maximum ratings 3.2 Thermal data 3.3 Recommended operating conditions 4 Electrical characteristics 5 Isolation 6 Functional description 6.1 Gate driving power supply and UVLO 6.2 Power-up, power-down and “safe state” 6.3 Control inputs 6.4 Miller Clamp function 6.5 Watchdog 6.6 Thermal shutdown protection 6.7 Standby function 7 Typical application diagram 8 Layout 8.1 Layout guidelines and considerations 8.2 Layout example 9 Testing and characterization information 10 Package information 10.1 SO-8W package information 10.2 SO-8W suggested land pattern 11 Ordering information Revision history Contents List of tables List of figures