Datasheet MASTERGAN4 (STMicroelectronics) - 8
| 制造商 | STMicroelectronics |
| 描述 | High power density 600V half-bridge driver with two enhancement mode GaN HEMT |
| 页数 / 页 | 27 / 8 — MASTERGAN4. GaN power transistor. 4.2. Table 6. GaN power transistor … |
| 文件格式/大小 | PDF / 480 Kb |
| 文件语言 | 英语 |
MASTERGAN4. GaN power transistor. 4.2. Table 6. GaN power transistor electrical characteristics. Symbol. Parameter. Test condition
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MASTERGAN4 GaN power transistor 4.2 GaN power transistor Table 6. GaN power transistor electrical characteristics
VGS = 6 V; TJ = 25 °C, unless otherwise specified.
Symbol Parameter Test condition Min Typ Max Unit
GaN on/off states I V DSS < 13.3 µA(1) (BR)DS Drain-source blocking voltage 650 - - V VGS = 0 V V I DS = 600 V DSS Zero gate voltage drain current - 0.5 - µA VGS = 0 V V V DS = VGS GS( th ) Gate threshold voltage - 1.7 - V ID = 1.7 mA(1) IGS Gate to source current VDS = 0 V(2) - 40 - µA TJ = 25°C - 225 300 RDS( on) Static drain-source on-resistance ID = 2.2 A mΩ TJ = 125°C (2) - 495 - 1. Tested at wafer level 2. Range estimated by characterization, not tested in production
DS13686
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Rev 1 page 8/27
Document Outline Features Applications Description 1 Block diagram 2 Pin descriptions and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history
MASTERGAN4 GaN power transistor 4.2 GaN power transistor Table 6. GaN power transistor electrical characteristics
VGS = 6 V; TJ = 25 °C, unless otherwise specified.
Symbol Parameter Test condition Min Typ Max Unit
GaN on/off states I V DSS < 13.3 µA(1) (BR)DS Drain-source blocking voltage 650 - - V VGS = 0 V V I DS = 600 V DSS Zero gate voltage drain current - 0.5 - µA VGS = 0 V V V DS = VGS GS( th ) Gate threshold voltage - 1.7 - V ID = 1.7 mA(1) IGS Gate to source current VDS = 0 V(2) - 40 - µA TJ = 25°C - 225 300 RDS( on) Static drain-source on-resistance ID = 2.2 A mΩ TJ = 125°C (2) - 495 - 1. Tested at wafer level 2. Range estimated by characterization, not tested in production
DS13686
-
Rev 1 page 8/27
Document Outline Features Applications Description 1 Block diagram 2 Pin descriptions and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history