Datasheet RAA227063 (Renesas) - 3
| 制造商 | Renesas |
| 描述 | 4.5V to 60V 3-Phase Smart Gate Driver |
| 页数 / 页 | 74 / 3 — RAA227063 Datasheet. Contents 1. Overview . 4. Pin Information . 9. … |
| 文件格式/大小 | PDF / 2.8 Mb |
| 文件语言 | 英语 |
RAA227063 Datasheet. Contents 1. Overview . 4. Pin Information . 9. Specifications . 13. Typical Performance Curves . 24
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RAA227063 Datasheet Contents 1. Overview . 4
1.1 Typical Application Circuits . 4
2. Pin Information . 9
2.1 Pin Assignments . 9 2.2 Pin Descriptions . 9
3. Specifications . 13
3.1 Absolute Maximum Ratings . 13 3.2 Thermal Information . 13 3.3 Recommended Operating Conditions . 14 3.4 Electrical Specifications . 14
4. Typical Performance Curves . 24 5. Functional Description . 26
5.1 Modes of Operation and Power-On Sequence . 26 5.2 Fault Management . 37 5.3 Current Sensing and BEMF Sensing . 42 5.4 Hardware Interface for Parameter Setting . 65 5.5 Serial Peripheral Interface (SPI) . 66
6. Register Map . 68 7. Package Outline Drawing . 72 8. Ordering Information . 73 9. Revision History . 73
R16DS0045EU0101 Rev.1.01 Page 3 Nov 29, 2021 Document Outline Applications Features Contents 1. Overview 1.1 Typical Application Circuits 2. Pin Information 2.1 Pin Assignments 2.2 Pin Descriptions 3. Specifications 3.1 Absolute Maximum Ratings 3.2 Thermal Information 3.3 Recommended Operating Conditions 3.4 Electrical Specifications 4. Typical Performance Curves 5. Functional Description 5.1 Modes of Operation and Power-On Sequence 5.1.1 Definitions of State of Different Modes 5.1.2 Mode Transition 5.1.3 Modes of Operation 5.1.3.1 Gate Driver Control Modes 5.1.3.2 3-phase HI/LI Mode 5.1.3.3 3-phase PWM Mode 5.1.4 Gate Driver Structure and Feature 5.1.4.1 Driver Structure 5.1.4.2 Adjustable Slew-Rate 5.1.4.3 Driver Robustness Enhancement 5.1.4.4 Gate Drive Diagram 5.1.4.5 Gate Drive Scheme in 3-phase HI/LI Mode 5.1.5 Power Architecture 5.1.5.1 Power Architecture Overview 5.1.5.2 Low-Side Driver Supply (VDRV) 5.1.5.3 Charge Pump 5.1.5.4 VCC Supply 5.1.5.5 MCU AUXVCC Supply 5.1.6 Power-On Sequence 5.2 Fault Management 5.2.1 Fault Conditions Types 5.2.2 nFAULT Indicator 5.3 Current Sensing and BEMF Sensing 5.3.1 Overview 5.3.2 Details on Different Sensing Configurations 5.3.2.1 Configuration 1 5.3.2.2 Configuration 2 5.3.2.3 Configuration 3 5.3.2.4 Configuration 4 5.3.2.5 Configuration 5 5.3.2.6 Configuration 6 5.3.2.7 Configuration 7 5.3.2.8 Configuration 8 5.3.2.9 Configuration 9 5.3.3 Structure of Amplifiers CSA, CSB, and CSC 5.3.4 BEMF Sensing Control Signal Logic 5.3.5 Multiplexer Control Signal Logic 5.3.6 Sample and Hold Timing Logic 5.3.7 Low-Side rDS(ON) Current Sensing Timing Logic 5.4 Hardware Interface for Parameter Setting 5.4.1 Parameter Setting Tables 5.5 Serial Peripheral Interface (SPI) 5.5.1 Communication Protocol 5.5.2 Timing Diagram 6. Register Map 7. Package Outline Drawing 8. Ordering Information 9. Revision History
RAA227063 Datasheet Contents 1. Overview . 4
1.1 Typical Application Circuits . 4
2. Pin Information . 9
2.1 Pin Assignments . 9 2.2 Pin Descriptions . 9
3. Specifications . 13
3.1 Absolute Maximum Ratings . 13 3.2 Thermal Information . 13 3.3 Recommended Operating Conditions . 14 3.4 Electrical Specifications . 14
4. Typical Performance Curves . 24 5. Functional Description . 26
5.1 Modes of Operation and Power-On Sequence . 26 5.2 Fault Management . 37 5.3 Current Sensing and BEMF Sensing . 42 5.4 Hardware Interface for Parameter Setting . 65 5.5 Serial Peripheral Interface (SPI) . 66
6. Register Map . 68 7. Package Outline Drawing . 72 8. Ordering Information . 73 9. Revision History . 73
R16DS0045EU0101 Rev.1.01 Page 3 Nov 29, 2021 Document Outline Applications Features Contents 1. Overview 1.1 Typical Application Circuits 2. Pin Information 2.1 Pin Assignments 2.2 Pin Descriptions 3. Specifications 3.1 Absolute Maximum Ratings 3.2 Thermal Information 3.3 Recommended Operating Conditions 3.4 Electrical Specifications 4. Typical Performance Curves 5. Functional Description 5.1 Modes of Operation and Power-On Sequence 5.1.1 Definitions of State of Different Modes 5.1.2 Mode Transition 5.1.3 Modes of Operation 5.1.3.1 Gate Driver Control Modes 5.1.3.2 3-phase HI/LI Mode 5.1.3.3 3-phase PWM Mode 5.1.4 Gate Driver Structure and Feature 5.1.4.1 Driver Structure 5.1.4.2 Adjustable Slew-Rate 5.1.4.3 Driver Robustness Enhancement 5.1.4.4 Gate Drive Diagram 5.1.4.5 Gate Drive Scheme in 3-phase HI/LI Mode 5.1.5 Power Architecture 5.1.5.1 Power Architecture Overview 5.1.5.2 Low-Side Driver Supply (VDRV) 5.1.5.3 Charge Pump 5.1.5.4 VCC Supply 5.1.5.5 MCU AUXVCC Supply 5.1.6 Power-On Sequence 5.2 Fault Management 5.2.1 Fault Conditions Types 5.2.2 nFAULT Indicator 5.3 Current Sensing and BEMF Sensing 5.3.1 Overview 5.3.2 Details on Different Sensing Configurations 5.3.2.1 Configuration 1 5.3.2.2 Configuration 2 5.3.2.3 Configuration 3 5.3.2.4 Configuration 4 5.3.2.5 Configuration 5 5.3.2.6 Configuration 6 5.3.2.7 Configuration 7 5.3.2.8 Configuration 8 5.3.2.9 Configuration 9 5.3.3 Structure of Amplifiers CSA, CSB, and CSC 5.3.4 BEMF Sensing Control Signal Logic 5.3.5 Multiplexer Control Signal Logic 5.3.6 Sample and Hold Timing Logic 5.3.7 Low-Side rDS(ON) Current Sensing Timing Logic 5.4 Hardware Interface for Parameter Setting 5.4.1 Parameter Setting Tables 5.5 Serial Peripheral Interface (SPI) 5.5.1 Communication Protocol 5.5.2 Timing Diagram 6. Register Map 7. Package Outline Drawing 8. Ordering Information 9. Revision History