Datasheet ADG1221, ADG1222, ADG1223 (Analog Devices)

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Low Capacitance, Low Charge Injection, ±15 V/+12 V
i
CMOS® Dual SPST Switches Data Sheet ADG1221/ ADG1222/ ADG1223 FEATURES FUNCTIONAL BLOCK DIAGRAM <0.5 pC charge injection over full signal range ADG1221 ADG1222 Off capacitance: 2 pF S1 Off leakage: 2 pA S1 IN1 IN1 Supply range: 33 V D1 D1 On resistance: 120 Ω D2 D2 Fully specified at ±15 V, +12 V IN2 IN2 S2 No VL supply required S2 3 V logic-compatible inputs Rail-to-rail operation 10-lead MSOP package ADG1223 APPLICATIONS S1 Automatic test equipment IN1 D1 Data acquisition systems D2 Battery-powered systems IN2 Sample-and-hold systems S2 Audio signal routing Video signal routing
01 -0
SWITCHES SHOWN FOR A LOGIC 0 INPUT Communication systems
6574 0 Figure 1.
GENERAL DESCRIPTION
The ADG1221/ADG1222/ADG1223 are monolithic, complemen- ADG1222. The ADG1223 has one switch with digital control tary metal-oxide semiconductor (CMOS) devices containing logic similar to that of the ADG1221; the logic is inverted on four independently selectable switches designed on an iCMOS the other switch. The ADG1223 exhibits break-before-make (industrial CMOS) process. iCMOS is a modular manufacturing switching action for use in multiplexer applications. Each process combining high voltage CMOS and bipolar technologies. switch conducts equally well in both directions when on and It enables the development of a wide range of high performance has an input signal range that extends to the supplies. In the off analog ICs, capable of 33 V operation, in a footprint that no condition, signal levels up to the supplies are blocked. previous generation of high voltage parts has been able to achieve.
0.5 T
Unlike analog ICs using conventional CMOS processes, iCMOS
A = 25ºC 0.4
components can tolerate high supply voltages while providing
V 0.3 DD = +15V V
increased performance, dramatically lower power consumption,
) SS = –15V C p 0.2
and reduced package size.
N ( IO 0.1
The ultralow capacitance and exceptionally low charge injection
CT JE 0
of these switches make them ideal solutions for data acquisition
N I E V –0.1 DD = 12V
and sample-and-hold applications, where low glitch and fast
VSS = 0V –0.2
settling are required. Figure 2 shows that there is minimum
CHARG
charge injection over the full signal range of the device.
–0.3 VDD = +5V
41
–0.4
0
V
The ADG1221/ADG1222/ADG1223 contain two independent
SS = –5V
4-
–0.5
657 0 single-pole/single-throw (SPST) switches. The ADG1221 and
–15 –10 –5 0 5 10 15
ADG1222 differ only in that the digital control logic is inverted.
INPUT VOLTAGE (V)
The ADG1221 switches are turned on with Logic 1 on the appro- Figure 2. Charge Injection vs. Input Voltage priate control input, and Logic 0 is required for the
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE