Datasheet ADG786, ADG788 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 2.5 , 1.8 V to 5.5 V, 2.5 V Triple/Quad SPDT Switches in Chip Scale Packages |
| 页数 / 页 | 11 / 9 — ADG786/ADG788. Test Circuits. IDS. S (OFF). D (ON). RON = V1/IDS. NC = NO … |
| 修订版 | C |
| 文件格式/大小 | PDF / 368 Kb |
| 文件语言 | 英语 |
ADG786/ADG788. Test Circuits. IDS. S (OFF). D (ON). RON = V1/IDS. NC = NO CONNECT. VDD. 0.1. ADDRESS DRIVE. 50%. S1B. VS1B. VOUT. S1A. VS1A. 90%. 300. 35pF
该数据表的模型线
文件文字版本
ADG786/ADG788 Test Circuits IDS V1 I I S (OFF) D (ON) S D S D S D A NC A VS V V VD S D RON = V1/IDS NC = NO CONNECT
Test Circuit 1. On Resistance Test Circuit 2. I Test Circuit 3. I S (OFF) D (ON)
VDD 0.1 F VDD ADDRESS DRIVE 50% 50% S1B VS1B D1 VOUT S1A VS1A R VS1A L CL 90% 90% 300 35pF VOUT IN/EN VS1B GND VSS tON tOFF 0.1 F VSS
Test Circuit 4. Switching Times, tON, tOFF
VDD VSS 0.1 F 3V VDD VSS ENABLE 50% 50% A2 DRIVE (VIN) S1A VS A1 S1B 0V A0 tOFF(EN) ADG786 VO 0.9V 0.9V 0 0 EN D1 VO CL V 50 RL OUTPUT IN GND 300 35pF 0V tON(EN)
Test Circuit 5. Enable Delay, tON (EN), tOFF (EN)
VDD 0.1 F 3V VDD ADDRESS SA VS ADDRESS* V 0V IN 50 SB ADG786/ ADG788 VS D1 VOUT RL CL VOUT 80% 80% GND VSS 300 35pF 0.1 F tOPEN VSS *A0, A1, A2 for ADG786, IN1-4 for ADG788
Test Circuit 6. Break-Before-Make Delay, tOPEN REV.$ –9–
Test Circuit 1. On Resistance Test Circuit 2. I Test Circuit 3. I S (OFF) D (ON)
VDD 0.1 F VDD ADDRESS DRIVE 50% 50% S1B VS1B D1 VOUT S1A VS1A R VS1A L CL 90% 90% 300 35pF VOUT IN/EN VS1B GND VSS tON tOFF 0.1 F VSS
Test Circuit 4. Switching Times, tON, tOFF
VDD VSS 0.1 F 3V VDD VSS ENABLE 50% 50% A2 DRIVE (VIN) S1A VS A1 S1B 0V A0 tOFF(EN) ADG786 VO 0.9V 0.9V 0 0 EN D1 VO CL V 50 RL OUTPUT IN GND 300 35pF 0V tON(EN)
Test Circuit 5. Enable Delay, tON (EN), tOFF (EN)
VDD 0.1 F 3V VDD ADDRESS SA VS ADDRESS* V 0V IN 50 SB ADG786/ ADG788 VS D1 VOUT RL CL VOUT 80% 80% GND VSS 300 35pF 0.1 F tOPEN VSS *A0, A1, A2 for ADG786, IN1-4 for ADG788
Test Circuit 6. Break-Before-Make Delay, tOPEN REV.$ –9–