Datasheet ADG621 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | CMOS, ±5 V/+5 V, 4 Ω Dual SPST Switches |
| 页数 / 页 | 12 / 3 — Data Sheet. ADG621. SPECIFICATIONS DUAL SUPPLY. Table 1. Parameter. +25°C … |
| 修订版 | C |
| 文件格式/大小 | PDF / 242 Kb |
| 文件语言 | 英语 |
Data Sheet. ADG621. SPECIFICATIONS DUAL SUPPLY. Table 1. Parameter. +25°C −40°C to +85°C. Unit. Test Conditions/Comments
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Data Sheet ADG621 SPECIFICATIONS DUAL SUPPLY
VDD = 5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1. Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = −4.5 V On Resistance, RON 4 Ω typ VS = ±4.5 V, IS = −10 mA, see Figure 14 5.5 7 Ω max On Resistance Match Between Channels, ∆RON 0.25 Ω typ VS = ±4.5 V, IS = −10 mA 0.35 0.4 Ω max On Resistance Flatness, RFLAT(ON) 0.9 0.9 Ω typ VS = ±3.3 V, IS = −10 mA 1.5 Ω max LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V Source Off Leakage, IS (Off) ±0.01 nA typ VS = ±4.5 V, VD = 4.5 V, see Figure 15 ±0.25 ±1 nA max Drain Off Leakage, ID (Off) ±0.01 nA typ VS = ±4.5 V, VD = 4.5 V, see Figure 15 ±0.25 ±1 nA max Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = ±4.5 V, see Figure 16 ±0.25 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH ±0.1 µA max Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS1 tON 75 ns typ RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 17 120 155 ns max tOFF 45 ns typ RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 17 70 85 ns max Charge Injection, QINJ 110 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 18 Off Isolation −65 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 19 Channel to Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 20 −3 dB Bandwidth 230 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 21 CS (Off) 20 pF typ f = 1 MHz CD (Off) 20 pF typ f = 1 MHz CD, CS (On) 70 pF typ f = 1 MHz POWER REQUIREMENTS2 VDD = 5.5 V, VSS = –5.5 V IDD 0.001 µA typ Digital inputs = 0 V or 5.5 V 1.0 µA max ISS 0.001 µA typ Digital inputs = 0 V or 5.5 V 1.0 µA max 1 Guaranteed by design; not subject to production test. 2 The device is fully specified at ±5 V dual supply and at +5 V single supply only. It is possible to operate the ADG621 with unbalanced supplies or at other voltage supplies (±2.7 V to ±5.5 V dual supply, and +2.7 V to +5.5 V single supply); however, the switch characteristics change. These changes include, but are not limited to, analog signal range, on resistance, leakage, VINL, VINH, and switching times. The optimal power-up sequence for the device is ground, VDD, VSS, and then the digital inputs, before applying the analog input signal. Rev. C | Page 3 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet ADG621 SPECIFICATIONS DUAL SUPPLY
VDD = 5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1. Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = −4.5 V On Resistance, RON 4 Ω typ VS = ±4.5 V, IS = −10 mA, see Figure 14 5.5 7 Ω max On Resistance Match Between Channels, ∆RON 0.25 Ω typ VS = ±4.5 V, IS = −10 mA 0.35 0.4 Ω max On Resistance Flatness, RFLAT(ON) 0.9 0.9 Ω typ VS = ±3.3 V, IS = −10 mA 1.5 Ω max LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V Source Off Leakage, IS (Off) ±0.01 nA typ VS = ±4.5 V, VD = 4.5 V, see Figure 15 ±0.25 ±1 nA max Drain Off Leakage, ID (Off) ±0.01 nA typ VS = ±4.5 V, VD = 4.5 V, see Figure 15 ±0.25 ±1 nA max Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = ±4.5 V, see Figure 16 ±0.25 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH ±0.1 µA max Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS1 tON 75 ns typ RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 17 120 155 ns max tOFF 45 ns typ RL = 300 Ω, CL = 35 pF; VS = 3.3 V, see Figure 17 70 85 ns max Charge Injection, QINJ 110 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 18 Off Isolation −65 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 19 Channel to Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 20 −3 dB Bandwidth 230 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 21 CS (Off) 20 pF typ f = 1 MHz CD (Off) 20 pF typ f = 1 MHz CD, CS (On) 70 pF typ f = 1 MHz POWER REQUIREMENTS2 VDD = 5.5 V, VSS = –5.5 V IDD 0.001 µA typ Digital inputs = 0 V or 5.5 V 1.0 µA max ISS 0.001 µA typ Digital inputs = 0 V or 5.5 V 1.0 µA max 1 Guaranteed by design; not subject to production test. 2 The device is fully specified at ±5 V dual supply and at +5 V single supply only. It is possible to operate the ADG621 with unbalanced supplies or at other voltage supplies (±2.7 V to ±5.5 V dual supply, and +2.7 V to +5.5 V single supply); however, the switch characteristics change. These changes include, but are not limited to, analog signal range, on resistance, leakage, VINL, VINH, and switching times. The optimal power-up sequence for the device is ground, VDD, VSS, and then the digital inputs, before applying the analog input signal. Rev. C | Page 3 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE