ADG508F/ADG509FA0 116 A1EN 215 GNDVSS 314 VADG509FDDS1A 4TOP VIEW13 S1BS2A(Not to Scale)512 S2BS3A 611 S3BS4A 710 S4B 5 00 DA 5- 89 DB 03 00 Figure 4. ADG509F Pin Configuration Table 6. ADG509FPin Function Descriptions Pin No.MnemonicDescription 1 A0 Logic Control Input. 2 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. 3 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. 4 S1A Source Terminal 1A. This pin can be an input or an output. 5 S2A Source Terminal 2A. This pin can be an input or an output. 6 S3A Source Terminal 3A. This pin can be an input or an output. 7 S4A Source Terminal 4A. This pin can be an input or an output. 8 DA Drain Terminal A. This pin can be an input or an output. 9 DB Drain Terminal B. This pin can be an input or an output. 10 S4B Source Terminal 4B. This pin can be an input or an output. 11 S3B Source Terminal 3B. This pin can be an input or an output. 12 S2B Source Terminal 2B. This pin can be an input or an output. 13 S1B Source Terminal 1B. This pin can be an input or an output. 14 VDD Most Positive Power Supply Potential. 15 GND Ground (0 V) Reference. 16 A1 Logic Control Input. Rev. F | Page 7 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY TRUTH TABLES ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE