Datasheet AT89C51 (Microchip) - 7

AT89C51 Flash Programming Modes Mode RST PSEN ALE/PROG EA/V P2.6 P2.7 P3.6 P3.7 PP
Write Code Data H L H/12V L H H H Read Code Data H L H H L L H H Write Lock Bit - 1 H L H/12V H H H H Bit - 2 H L H/12V H H L L Bit - 3 H L H/12V H L H L Chip Erase H L H/12V H L L L (1) Read Signature Byte H L H H L L L L Note: 1. Chip Erase requires a 10 ms PROG pulse.
Figure 3.
Programming the Flash
Figure 4.
Verifying the Flash +5V +5V AT89C51 AT89C51 A0 - A7 A0 - A7 ADDR. P1 V V CC ADDR. P1 CC OOOOH/OFFFH PGM OOOOH/0FFFH PGM DATA P2.0 - P2.3 P0 P2.0 - P2.3 P0 (USE 10K A8 - A11 DATA A8 - A11 PULLUPS) P2.6 P2.6 SEE FLASH P2.7 ALE PROG SEE FLASH P2.7 ALE PROGRAMMING PROGRAMMING P3.6 MODES TABLE P3.6 MODES TABLE VIH P3.7 P3.7 XTAL2 EA V /V XTAL2 EA IH PP 3-24 MHz 3-24 MHz XTAL1 RST V XTAL1 RST V IH IH GND PSEN GND PSEN
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Document Outline Block Diagram Features Description Pin Description VCC GND Port 0 Port 1 Port 2 Port 3 RST ALE/PROG PSEN EA/VPP XTAL1 XTAL2 Oscillator Characteristics Status of External Pins During Idle and Power-down Modes Lock Bit Protection Modes Programming the Flash Programming Interface Flash Programming Modes Flash Programming and Verification Waveforms - High-voltage Mode (VPP = 12V) Flash Programming and Verification Waveforms - Low-voltage Mode (VPP = 5V) Flash Programming and Verification Characteristics Absolute Maximum Ratings* DC Characteristics AC Characteristics External Program and Data Memory Characteristics External Program Memory Read Cycle External Data Memory Read Cycle External Data Memory Write Cycle External Clock Drive Waveforms External Clock Drive Serial Port Timing: Shift Register Mode Test Conditions Shift Register Mode Timing Waveforms AC Testing Input/Output Waveforms(1) Float Waveforms(1) Ordering Information