Datasheet AT89C51 (Microchip) - 8
| 制造商 | Microchip |
| 描述 | 8-bit Microcontroller with 4K Bytes Flash |
| 页数 / 页 | 17 / 8 — Flash Programming and Verification Waveforms - High-voltage Mode (V. = … |
| 文件格式/大小 | PDF / 145 Kb |
| 文件语言 | 英语 |
Flash Programming and Verification Waveforms - High-voltage Mode (V. = 12V)
该数据表的模型线
- AT89C51-12AC AT89C51-12AI AT89C51-12JC AT89C51-12JI AT89C51-12PC AT89C51-12PI AT89C51-12QC AT89C51-12QI AT89C51-16AC AT89C51-16AI AT89C51-16JC AT89C51-16JI AT89C51-16PC AT89C51-16PI AT89C51-16QC AT89C51-16QI AT89C51-20AC AT89C51-20AI AT89C51-20JC AT89C51-20JI AT89C51-20PC AT89C51-20PI AT89C51-20QC AT89C51-20QI AT89C51-24AC AT89C51-24AI AT89C51-24JC AT89C51-24JI AT89C51-24PC AT89C51-24PI AT89C51-24QC AT89C51-24QI
文件文字版本
Flash Programming and Verification Waveforms - High-voltage Mode (V = 12V) PP
PROGRAMMING VERIFICATION P1.0 - P1.7 ADDRESS ADDRESS P2.0 - P2.3 tAVQV PORT 0 DATA IN DATA OUT t t DVGL GHDX t t AVGL GHAX ALE/PROG t t SHGL t GHSL GLGH VPP LOGIC 1 EA/VPP LOGIC 0 tEHSH t tEHQZ ELQV P2.7 (ENABLE) tGHBL P3.4 (RDY/BSY) BUSY READY tWC
Flash Programming and Verification Waveforms - Low-voltage Mode (V = 5V) PP
PROGRAMMING VERIFICATION P1.0 - P1.7 ADDRESS ADDRESS P2.0 - P2.3 tAVQV PORT 0 DATA IN DATA OUT t t DVGL GHDX t t AVGL GHAX ALE/PROG tSHGL tGLGH LOGIC 1 EA/VPP LOGIC 0 tEHSH t tEHQZ ELQV P2.7 (ENABLE) tGHBL P3.4 (RDY/BSY) BUSY READY tWC
8 AT89C51
Document Outline Block Diagram Features Description Pin Description VCC GND Port 0 Port 1 Port 2 Port 3 RST ALE/PROG PSEN EA/VPP XTAL1 XTAL2 Oscillator Characteristics Status of External Pins During Idle and Power-down Modes Lock Bit Protection Modes Programming the Flash Programming Interface Flash Programming Modes Flash Programming and Verification Waveforms - High-voltage Mode (VPP = 12V) Flash Programming and Verification Waveforms - Low-voltage Mode (VPP = 5V) Flash Programming and Verification Characteristics Absolute Maximum Ratings* DC Characteristics AC Characteristics External Program and Data Memory Characteristics External Program Memory Read Cycle External Data Memory Read Cycle External Data Memory Write Cycle External Clock Drive Waveforms External Clock Drive Serial Port Timing: Shift Register Mode Test Conditions Shift Register Mode Timing Waveforms AC Testing Input/Output Waveforms(1) Float Waveforms(1) Ordering Information
PROGRAMMING VERIFICATION P1.0 - P1.7 ADDRESS ADDRESS P2.0 - P2.3 tAVQV PORT 0 DATA IN DATA OUT t t DVGL GHDX t t AVGL GHAX ALE/PROG t t SHGL t GHSL GLGH VPP LOGIC 1 EA/VPP LOGIC 0 tEHSH t tEHQZ ELQV P2.7 (ENABLE) tGHBL P3.4 (RDY/BSY) BUSY READY tWC
Flash Programming and Verification Waveforms - Low-voltage Mode (V = 5V) PP
PROGRAMMING VERIFICATION P1.0 - P1.7 ADDRESS ADDRESS P2.0 - P2.3 tAVQV PORT 0 DATA IN DATA OUT t t DVGL GHDX t t AVGL GHAX ALE/PROG tSHGL tGLGH LOGIC 1 EA/VPP LOGIC 0 tEHSH t tEHQZ ELQV P2.7 (ENABLE) tGHBL P3.4 (RDY/BSY) BUSY READY tWC
8 AT89C51
Document Outline Block Diagram Features Description Pin Description VCC GND Port 0 Port 1 Port 2 Port 3 RST ALE/PROG PSEN EA/VPP XTAL1 XTAL2 Oscillator Characteristics Status of External Pins During Idle and Power-down Modes Lock Bit Protection Modes Programming the Flash Programming Interface Flash Programming Modes Flash Programming and Verification Waveforms - High-voltage Mode (VPP = 12V) Flash Programming and Verification Waveforms - Low-voltage Mode (VPP = 5V) Flash Programming and Verification Characteristics Absolute Maximum Ratings* DC Characteristics AC Characteristics External Program and Data Memory Characteristics External Program Memory Read Cycle External Data Memory Read Cycle External Data Memory Write Cycle External Clock Drive Waveforms External Clock Drive Serial Port Timing: Shift Register Mode Test Conditions Shift Register Mode Timing Waveforms AC Testing Input/Output Waveforms(1) Float Waveforms(1) Ordering Information