Datasheet ADM803, ADM809, ADM810 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Microprocessor Supervisory Circuits in 3-Lead SC70 and SOT-23 |
| 页数 / 页 | 11 / 5 — Data Sheet. ADM803/ADM809/ADM810. PIN CONFIGURATIONS AND FUNCTION … |
| 文件格式/大小 | PDF / 211 Kb |
| 文件语言 | 英语 |
Data Sheet. ADM803/ADM809/ADM810. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. GND 1. ADM803/. ADM809/. ADM810. TOP VIEW. 3 VCC
该数据表的模型线
- ADM803LAKSZ-REEL ADM803LAKSZ-REEL7 ADM803MAKSZ-REEL7 ADM803RAKSZ-REEL7 ADM803SAKSZ-REEL ADM803SAKSZ-REEL7 ADM803TAKSZ-REEL7 ADM803ZAKSZ-REEL7
- ADM809-5LARTZ-RL7 ADM809-5SAKSZ-RL7 ADM809-5SARTZ-RL7 ADM809JAKSZ-REEL7 ADM809JARTZ-REEL7 ADM809LAKSZ-REEL7 ADM809LARTZ-REEL ADM809LARTZ-REEL7 ADM809MARTZ-REEL ADM809MARTZ-REEL7 ADM809RAKSZ-REEL ADM809RAKSZ-REEL7 ADM809RARTZ-REEL7 ADM809SAKSZ-REEL7 ADM809SARTZ-REEL7 ADM809TAKSZ-REEL7 ADM809TARTZ-REEL ADM809TARTZ-REEL7 ADM809ZARTZ-REEL7
文件文字版本
Data Sheet ADM803/ADM809/ADM810 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS GND 1 ADM803/ GND 1 ADM809/ ADM810 TOP VIEW 3 VCC TOP VIEW 3 VCC (Not to Scale) (Not to Scale)
002 102
RESET 2 RESET 2
03736- 03736- Figure 3. ADM803/ADM809 Pin Configuration Figure 4. ADM810 Pin Configuration
Table 4. Pin Function Descriptions Pin No. ADM803/ ADM809 ADM810 Mnemonic Description
1 1 GND Ground Reference for All Signals; 0 V. N/A 2 RESET Active High Logic Output. RESET remains high while VCC is below the reset threshold and remains high for 240 ms (typical) after VCC rises above the reset threshold. 2 N/A RESET Active Low Logic Output. RESET remains low while VCC is below the reset threshold and remains low for 240 ms (typical) after VCC rises above the reset threshold. 3 3 VCC Supply Voltage Being Monitored. Rev. I | Page 5 of 11 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS INTERFACING TO OTHER DEVICES ENSURING A VALID RESET OUTPUT DOWN TO VCC = 0 V BENEFITS OF AN ACCURATE RESET THRESHOLD INTERFACING TO MICROPROCESSORS WITH MULTIPLE INTERRUPTS OUTLINE DIMENSIONS ORDERING GUIDE
002 102
RESET 2 RESET 2
03736- 03736- Figure 3. ADM803/ADM809 Pin Configuration Figure 4. ADM810 Pin Configuration
Table 4. Pin Function Descriptions Pin No. ADM803/ ADM809 ADM810 Mnemonic Description
1 1 GND Ground Reference for All Signals; 0 V. N/A 2 RESET Active High Logic Output. RESET remains high while VCC is below the reset threshold and remains high for 240 ms (typical) after VCC rises above the reset threshold. 2 N/A RESET Active Low Logic Output. RESET remains low while VCC is below the reset threshold and remains low for 240 ms (typical) after VCC rises above the reset threshold. 3 3 VCC Supply Voltage Being Monitored. Rev. I | Page 5 of 11 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS INTERFACING TO OTHER DEVICES ENSURING A VALID RESET OUTPUT DOWN TO VCC = 0 V BENEFITS OF AN ACCURATE RESET THRESHOLD INTERFACING TO MICROPROCESSORS WITH MULTIPLE INTERRUPTS OUTLINE DIMENSIONS ORDERING GUIDE