Data SheetADM803/ADM809/ADM810OUTLINE DIMENSIONS3.04 2.90 2.801.40 1.30 1.2032.64 2.10120.601.030.450.892.05 1.781.020.540.95REF1.12GAUGE0.88PLANE0.890.1000.1800.0130.0850.51SEATING0.25PLANE0.370.60 MAX 0.30 MINCCOMPLIANT TO JEDEC STANDARDS TO-236-AB011909- Figure 14. 3-Lead Small Outline Transistor Package [SOT-23-3] (RT-3) Dimensions shown in millimeters 2.20 2.00 1.801.35 1.25 1.1532.40 2.10121.800.65 BSC1.001.100.400.800.800.100.300.400.260.10 MAXSEATING0.100.200.25PLANECOPLANARITY0.100.10-A 9 0 8 2ALL DIMENSIONS COMPLIANT WITH EIAJ SC707 0 Figure 15. 3-Lead Thin Shrink Small Outline Transistor Package [SC70] (KS-3) Dimensions shown in millimeters Rev. I | Page 9 of 11 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS INTERFACING TO OTHER DEVICES ENSURING A VALID RESET OUTPUT DOWN TO VCC = 0 V BENEFITS OF AN ACCURATE RESET THRESHOLD INTERFACING TO MICROPROCESSORS WITH MULTIPLE INTERRUPTS OUTLINE DIMENSIONS ORDERING GUIDE