Datasheet ALD1107, ALD1117 (Advanced Linear Devices)
| 制造商 | Advanced Linear Devices |
| 描述 | Quad/Dual P-channel Matched Pair Mosfet Array |
| 页数 / 页 | 9 / 1 — ALD1107/ALD1117. QUAD/DUAL P-CHANNEL MATCHED PAIR MOSFET ARRAY. GENERAL … |
| 文件格式/大小 | PDF / 86 Kb |
| 文件语言 | 英语 |
ALD1107/ALD1117. QUAD/DUAL P-CHANNEL MATCHED PAIR MOSFET ARRAY. GENERAL DESCRIPTION. APPLICATIONS. PIN CONFIGURATION. ALD1117
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ADVANCED LINEAR DEVICES, INC.
ALD1107/ALD1117 QUAD/DUAL P-CHANNEL MATCHED PAIR MOSFET ARRAY GENERAL DESCRIPTION APPLICATIONS
The ALD1107/ALD1117 are monolithic quad/dual P-channel enhance- • Precision current mirrors ment mode matched MOSFET transistor arrays intended for a broad • Precision current sources range of precision analog applications. The ALD1107/ALD1117 offer • Voltage choppers high input impedance and negative current temperature coefficient. The • Differential amplifier input stage transistor pairs are matched for minimum offset voltage and differential • Voltage comparator thermal response, and they are designed for precision analog switching • Data converters and amplifying applications in -2V to -10V systems where low input bias • Sample and Hold current, low input capacitance and fast switching speed are desired. • Analog signal processing These MOSFET devices feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment. The ALD1107/ ALD1117 are building blocks for differential amplifier input stages,
PIN CONFIGURATION
transmission gates, multiplexer applications, current sources and many precision analog circuits.
ALD1117 FEATURES DP1 1 8 DP2
• Low threshold voltage of -0.7V
G 2 7 G
• Low input capacitance
P1 P2
• Low Vos -- 2mV typical
SP1 3 6 SP2
• High input impedance -- 1014Ω typical • Negative current (IDS) temperature coefficient
V- 4 5 V+
• Enhancement-mode (normally off) • DC current gain 109
TOP VIEW
• Low input and output leakage currents
SAL, PAL PACKAGES
• RoHS compliant
ALD1107 ORDERING INFORMATION
(“L” suffix denotes lead-free (RoHS))
DP1 1 14 DP2 Operating Temperature Range* G 2 13 G P1 P2
0°C to +70°C 0°C to +70°C
SP1 3 12 SP2
8-Pin SOIC 8-Pin Plastic Dip Package Package
V- 4 11 V+
ALD1117SAL ALD1117PAL
D 5 10 P4 DP3
14-Pin SOIC 14-Pin Plastic Dip
G 6 9 P4 GP3
Package Package
S 7 8 P4 SP3
ALD1107SBL ALD1107PBL
TOP VIEW
* Contact factory for high temperature versions.
SBL, PBL PACKAGES BLOCK DIAGRAMS ALD1107 ALD1117 V- (4) V- (4) DP1 (1) DP2 (14) DP3 (10) DP4 (5)
~
DP1 (1) DP2 (8)
~
GP1 (2) GP2 (13) GP3 (9) GP4 (6) GP1 (2) GP2 (7) V+ V+ (5) S V+ P1 (3) SP2 (12) SP3 (8) S SP1 (3) SP2 (6) (11) P4 (7) (11)
©2021 Advanced Linear Devices, Inc., Vers. 2.2 www.aldinc.com 1 of 9
ALD1107/ALD1117 QUAD/DUAL P-CHANNEL MATCHED PAIR MOSFET ARRAY GENERAL DESCRIPTION APPLICATIONS
The ALD1107/ALD1117 are monolithic quad/dual P-channel enhance- • Precision current mirrors ment mode matched MOSFET transistor arrays intended for a broad • Precision current sources range of precision analog applications. The ALD1107/ALD1117 offer • Voltage choppers high input impedance and negative current temperature coefficient. The • Differential amplifier input stage transistor pairs are matched for minimum offset voltage and differential • Voltage comparator thermal response, and they are designed for precision analog switching • Data converters and amplifying applications in -2V to -10V systems where low input bias • Sample and Hold current, low input capacitance and fast switching speed are desired. • Analog signal processing These MOSFET devices feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment. The ALD1107/ ALD1117 are building blocks for differential amplifier input stages,
PIN CONFIGURATION
transmission gates, multiplexer applications, current sources and many precision analog circuits.
ALD1117 FEATURES DP1 1 8 DP2
• Low threshold voltage of -0.7V
G 2 7 G
• Low input capacitance
P1 P2
• Low Vos -- 2mV typical
SP1 3 6 SP2
• High input impedance -- 1014Ω typical • Negative current (IDS) temperature coefficient
V- 4 5 V+
• Enhancement-mode (normally off) • DC current gain 109
TOP VIEW
• Low input and output leakage currents
SAL, PAL PACKAGES
• RoHS compliant
ALD1107 ORDERING INFORMATION
(“L” suffix denotes lead-free (RoHS))
DP1 1 14 DP2 Operating Temperature Range* G 2 13 G P1 P2
0°C to +70°C 0°C to +70°C
SP1 3 12 SP2
8-Pin SOIC 8-Pin Plastic Dip Package Package
V- 4 11 V+
ALD1117SAL ALD1117PAL
D 5 10 P4 DP3
14-Pin SOIC 14-Pin Plastic Dip
G 6 9 P4 GP3
Package Package
S 7 8 P4 SP3
ALD1107SBL ALD1107PBL
TOP VIEW
* Contact factory for high temperature versions.
SBL, PBL PACKAGES BLOCK DIAGRAMS ALD1107 ALD1117 V- (4) V- (4) DP1 (1) DP2 (14) DP3 (10) DP4 (5)
~
DP1 (1) DP2 (8)
~
GP1 (2) GP2 (13) GP3 (9) GP4 (6) GP1 (2) GP2 (7) V+ V+ (5) S V+ P1 (3) SP2 (12) SP3 (8) S SP1 (3) SP2 (6) (11) P4 (7) (11)
©2021 Advanced Linear Devices, Inc., Vers. 2.2 www.aldinc.com 1 of 9