Datasheet BSS84 (Diodes) - 2
制造商 | Diodes |
描述 | P-Channel Enhancement Mode MOSFET |
页数 / 页 | 6 / 2 — BSS84. Marking Information. Year. 1998. 2021. 2022. 2023. 2024. 2025. … |
文件格式/大小 | PDF / 411 Kb |
文件语言 | 英语 |
BSS84. Marking Information. Year. 1998. 2021. 2022. 2023. 2024. 2025. 2026. 2027. 2028. 2029. 2030. Code. Month. Jan. Feb. Mar. Apr. May. Jun. Jul. Aug. Sep. Oct. Nov. Dec
该数据表的模型线
文件文字版本
BSS84 Marking Information
K84 = Product Type Marking Code YM = Date Code Marking Y or Y = Year (ex: I = 2021) M or M = Month (ex: 9 = September) Date Code Key
Year 1998 …… 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 Code
J …… I J K L M N O P R S
Month Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec Code
1 2 3 4 5 6 7 8 9 O N D
Maximum Ratings
(@ TA = +25°C, unless otherwise specified.)
Characteristic Symbol Value Unit
Drain-Source Voltage VDSS -50 V Drain-Gate Voltage RGS ≤ 20kΩ VDGR -50 V Gate-Source Voltage Continuous VGSS ±20 V Drain Current (Note 5) Continuous ID -130 mA Pulsed Drain Current IDM -1.2 A
Thermal Characteristics
(@ TA = +25°C, unless otherwise specified.)
Characteristic Symbol Value Unit
Total Power Dissipation (Note 5) PD 300 mW Thermal Resistance, Junction to Ambient RθJA 417 °C/W Operating and Storage Temperature Range TJ, TSTG -55 to +150 °C
Electrical Characteristics
(@ TA = +25°C, unless otherwise specified.)
Characteristic Symbol Min Typ Max Unit Test Condition OFF CHARACTERISTICS (Note 6)
Drain-Source Breakdown Voltage BVDSS -50 V VGS = 0V, ID = -250µA -1 µA VDS = -50V, VGS = 0V, TJ = +25°C Zero Gate Voltage Drain Current IDSS -2 µA VDS = -50V, VGS = 0V, TJ = +125°C -100 nA VDS = -25V, VGS = 0V, TJ = +25°C Gate-Body Leakage IGSS ±10 nA VGS = ±20V, VDS = 0V
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage VGS(th) -0.8 -2.0 V VDS = VGS, ID = -1mA Static Drain-Source On-Resistance RDS(on) 3.2 10 Ω VGS = -5V, ID = -0.100A Forward Transconductance gFS 0.05 S VDS = -25V, ID = -0.1A
DYNAMIC CHARACTERISTICS (Note 7)
Input Capacitance Ciss 24.6 45 pF Output Capacitance Coss 4.7 25 pF VDS = -25V, VGS = 0V, f = 1.0MHz Reverse Transfer Capacitance Crss 2.8 12 pF Gate Resistance Rg 916 Ω VDS = 0V, VGS = 0V, f = 1MHz Total Gate Charge (VGS = -4.5V) Qg 0.28 nC Total Gate Charge (VGS = -10V) Qg 0.59 nC VDS = -10V, ID = -0.1A Gate-Source Charge Qgs 0.09 nC Gate-Drain Charge Qgd 0.08 nC Turn-On Delay Time tD(on) 10 ns VDD = -30V, ID = -0.27A, Turn-Off Delay Time tD(off) 18 ns RGEN = 50Ω, VGS = -10V Notes: 5. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch; pad layout as shown in Diodes Incorporated’s package outline PDFs, which can be found on our website at http://www.diodes.com/package-outlines.html. 6. Short duration pulse test used to minimize self-heating effect. 7. Guaranteed by design. Not subject to production testing. BSS84 2 of 6 August 2021 Document number: DS30149 Rev. 25 - 2
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© Diodes Incorporated Document Outline Features and Benefits Product Summary Description and Applications Mechanical Data Marking Information Package Outline Dimensions Suggested Pad Layout