SiC951 www.vishay.com Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM V EN IN VDRV UVLO PV Linear regulator IN VDD VDD VDRV UVLO SW Charge PFD RT_SYNC pump BOOT Ramp generator V T SEN+ PWM on Differential comparator generator amplifier HIGH SIDE V PH SEN- OTA DRIVER Rcomp Minimum T C off comp CP VOUT Control Reference logic generator VDRV Bandgap and SW DAC V V SET SET ADC LOW SIDE ADDR ADC PEC/BUS Command DRIVER management registers SALRT PMBus interface SCLK 1K NVM Over SDA current Fault protection management Monitoring Zero AGND compensation P Monitoring GOOD crossing P / P IN OUT circuit sense detector ADC calculation circuits PGOOD PGND Fig. 3 - Functional Block Diagram S23-0736-Rev. C, 12-Sep-2023 7 Document Number: 71554 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000