Datasheet PE4259 (pSemi) - 4
| 制造商 | pSemi |
| 描述 | SPDT High Power UltraCMOS 10 MHz–3.0 GHz RF Switch |
| 页数 / 页 | 10 / 4 — PE4259. Table 5. Single-pin Control Logic Truth Table. Control Logic … |
| 文件格式/大小 | PDF / 575 Kb |
| 文件语言 | 英语 |
PE4259. Table 5. Single-pin Control Logic Truth Table. Control Logic Input. Control Voltages. Signal Path
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PE4259
Product Specification
Table 5. Single-pin Control Logic Truth Table Control Logic Input Control Voltages Signal Path
The PE4259 is a versatile RF CMOS switch that supports two operating control modes; single-pin Pin 6 (VDD) = VDD RFC to RF1 Pin 4 (CTRL) = High control mode and complementary-pin control mode. Pin 6 (VDD) = VDD RFC to RF2 Pin 4 (CTRL) = Low Single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting
Table 6. Complementary-pin Control Logic
a +3-volt CMOS logic input, and requires a
Truth Table
dedicated +3-volt power supply connection on pin 6 (VDD). This mode of operation reduces the
Control Voltages Signal Path
number of control lines required and simplifies the Pin 6 (CTRL or VDD) = Low switch control interface typically derived from a RFC to RF1 Pin 4 (CTRL) = High CMOS Processor I/O port. Pin 6 (CTRL or VDD) = High RFC to RF2 Complementary-pin control mode allows the Pin 4 (CTRL) = Low switch to operate using complementary control pins CTRL and CTRL (pins 4 and 6), that can be directly driven by +3-volt CMOS logic or a suitable
Thermal Data
Processor I/O port. This enables the PE4259 to Psi-JT (JT), junction top-of-package, is a thermal be used as a potential alternate source for SPDT metric to estimate junction temperature of a de- RF switch products used in positive control vice on the customer application PCB (JEDEC voltage mode and operating within the PE4259 JESD51-2). operating limits. JT = (TJ – TT)/P Where JT = junction-to-top of package characterization parameter, °C/W TJ = die junction temperature, °C TT = package temperature (top surface, in the center), °C
Table 7. Thermal Data Parameter Typ Unit
Maximum junction temperature, TJMAX (RF input power, CW = 31.5 dBm, +85 °C 99 °C ambient) 37 °C/W JT JA, junction-to-ambient thermal resistance 104 °C/W ©2005-2023 pSemi Corporation All rights reserved. Document No. DOC-03694-5 │ UltraCMOS® RFIC Solutions
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Product Specification
Table 5. Single-pin Control Logic Truth Table Control Logic Input Control Voltages Signal Path
The PE4259 is a versatile RF CMOS switch that supports two operating control modes; single-pin Pin 6 (VDD) = VDD RFC to RF1 Pin 4 (CTRL) = High control mode and complementary-pin control mode. Pin 6 (VDD) = VDD RFC to RF2 Pin 4 (CTRL) = Low Single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting
Table 6. Complementary-pin Control Logic
a +3-volt CMOS logic input, and requires a
Truth Table
dedicated +3-volt power supply connection on pin 6 (VDD). This mode of operation reduces the
Control Voltages Signal Path
number of control lines required and simplifies the Pin 6 (CTRL or VDD) = Low switch control interface typically derived from a RFC to RF1 Pin 4 (CTRL) = High CMOS Processor I/O port. Pin 6 (CTRL or VDD) = High RFC to RF2 Complementary-pin control mode allows the Pin 4 (CTRL) = Low switch to operate using complementary control pins CTRL and CTRL (pins 4 and 6), that can be directly driven by +3-volt CMOS logic or a suitable
Thermal Data
Processor I/O port. This enables the PE4259 to Psi-JT (JT), junction top-of-package, is a thermal be used as a potential alternate source for SPDT metric to estimate junction temperature of a de- RF switch products used in positive control vice on the customer application PCB (JEDEC voltage mode and operating within the PE4259 JESD51-2). operating limits. JT = (TJ – TT)/P Where JT = junction-to-top of package characterization parameter, °C/W TJ = die junction temperature, °C TT = package temperature (top surface, in the center), °C
Table 7. Thermal Data Parameter Typ Unit
Maximum junction temperature, TJMAX (RF input power, CW = 31.5 dBm, +85 °C 99 °C ambient) 37 °C/W JT JA, junction-to-ambient thermal resistance 104 °C/W ©2005-2023 pSemi Corporation All rights reserved. Document No. DOC-03694-5 │ UltraCMOS® RFIC Solutions
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