Datasheet MAX6070 (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | Low-Noise, High-Precision Series Voltage References |
| 页数 / 页 | 26 / 2 — MAX6070/MAX6071. Absolute Maximum Ratings. Package Information. 6 SOT23. … |
| 文件格式/大小 | PDF / 6.6 Mb |
| 文件语言 | 英语 |
MAX6070/MAX6071. Absolute Maximum Ratings. Package Information. 6 SOT23. PACKAGE CODE. U6+5/U6+5A. 21-0058. 90-0175
该数据表的模型线
- MAX6070AAUT12+ MAX6070AAUT12+T MAX6070AAUT18+ MAX6070AAUT18+T MAX6070AAUT18/V+ MAX6070AAUT18/V+T MAX6070AAUT21+ MAX6070AAUT21+T MAX6070AAUT25+ MAX6070AAUT25+T MAX6070AAUT30+ MAX6070AAUT30+T MAX6070AAUT33+ MAX6070AAUT33+T MAX6070AAUT33/V+ MAX6070AAUT33/V+T MAX6070AAUT41+ MAX6070AAUT41+T MAX6070AAUT50+ MAX6070AAUT50+T MAX6070AAUT50/V+ MAX6070AAUT50/V+T MAX6070BAUT12+ MAX6070BAUT12+T MAX6070BAUT12/V+ MAX6070BAUT12/V+T MAX6070BAUT18+ MAX6070BAUT18+T MAX6070BAUT21+ MAX6070BAUT21+T MAX6070BAUT21/V+ MAX6070BAUT21/V+T MAX6070BAUT25+ MAX6070BAUT25+T MAX6070BAUT25/V+ MAX6070BAUT25/V+T MAX6070BAUT30+ MAX6070BAUT30+T MAX6070BAUT33+ MAX6070BAUT33+T MAX6070BAUT33/V+ MAX6070BAUT33/V+T MAX6070BAUT41+ MAX6070BAUT41+T MAX6070BAUT41/V+ MAX6070BAUT41/V+T MAX6070BAUT50+ MAX6070BAUT50+T MAX6070DAUT12/V+ MAX6070DAUT12/V+T MAX6070DAUT25/V+ MAX6070DAUT25/V+T MAX6070DAUT30/V+ MAX6070DAUT30/V+T MAX6070DAUT41/V+ MAX6070DAUT41/V+T
- MAX6071AAUT12+ MAX6071AAUT12+T MAX6071AAUT18+ MAX6071AAUT18+T MAX6071AAUT21+ MAX6071AAUT21+T MAX6071AAUT25+ MAX6071AAUT25+T MAX6071AAUT30+ MAX6071AAUT30+T MAX6071AAUT30/V+ MAX6071AAUT30/V+T MAX6071AAUT33+ MAX6071AAUT33+T MAX6071AAUT41+ MAX6071AAUT41+T MAX6071AAUT50+ MAX6071AAUT50+T MAX6071ANT25+ MAX6071ANT25+T MAX6071BAUT12+ MAX6071BAUT12+T MAX6071BAUT18+ MAX6071BAUT18+T MAX6071BAUT21+ MAX6071BAUT21+T MAX6071BAUT25+ MAX6071BAUT25+T MAX6071BAUT25/V+ MAX6071BAUT25/V+T MAX6071BAUT30+ MAX6071BAUT30+T MAX6071BAUT33+ MAX6071BAUT33+T MAX6071BAUT41+ MAX6071BAUT41+T MAX6071BAUT50+ MAX6071BAUT50+T
文件文字版本
MAX6070/MAX6071
Low-Noise, High-Precision Series Voltage References
Absolute Maximum Ratings
OUTF to GNDS, GNDF, GND .. -0.3V to the lower of Continuous Power Dissipation (TA = +70°C) (VIN + 0.3V), +6V SOT23 (derate 4.3mW/NC above +70°C) ... 347.8mW OUTS to GNDS, GNDF, GND ...-0.3V to +6V WLP (derate 10.2mW/NC above 70°C ..816mW IN to GNDS, GNDF, GND ...-0.3V to +6V Operating Temperature Range ... -40°C to +125°C EN to GNDS, GNDF, GND ..-0.3V to +6V Junction Temperature ..+150°C FILTER to GND .. -0.3V to the lower of Storage Temperature Range .. -65°C to +150°C (VIN + 0.3V), +6V Soldering Temperature (reflow) ...+260°C GNDS to GNDF ..-0.3V to +0.3V Lead Temperature (soldering, 10s) ...+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 6 SOT23 PACKAGE CODE U6+5/U6+5A
Outline Number
21-0058
Land Pattern Number
90-0175 Thermal Resistance, Multi-Layer Board:
Junction to Ambient (θJA) 230°C/W Junction to Case (θJC) 76°C/W
6 Thin WLP PACKAGE CODE N60B1+1
Outline Number
21-0744
Land Pattern Number Refer to
Application Note 1891 Thermal Resistance, Multi-Layer Board:
Junction to Ambient (θJA) 98°C/W For the latest package outline information and land patterns (footprints), go to
www.analog.com/packages
. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to
www.analog.com/thermal-tutorial
. www.analog.com Analog Devices │ 2
Low-Noise, High-Precision Series Voltage References
Absolute Maximum Ratings
OUTF to GNDS, GNDF, GND .. -0.3V to the lower of Continuous Power Dissipation (TA = +70°C) (VIN + 0.3V), +6V SOT23 (derate 4.3mW/NC above +70°C) ... 347.8mW OUTS to GNDS, GNDF, GND ...-0.3V to +6V WLP (derate 10.2mW/NC above 70°C ..816mW IN to GNDS, GNDF, GND ...-0.3V to +6V Operating Temperature Range ... -40°C to +125°C EN to GNDS, GNDF, GND ..-0.3V to +6V Junction Temperature ..+150°C FILTER to GND .. -0.3V to the lower of Storage Temperature Range .. -65°C to +150°C (VIN + 0.3V), +6V Soldering Temperature (reflow) ...+260°C GNDS to GNDF ..-0.3V to +0.3V Lead Temperature (soldering, 10s) ...+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 6 SOT23 PACKAGE CODE U6+5/U6+5A
Outline Number
21-0058
Land Pattern Number
90-0175 Thermal Resistance, Multi-Layer Board:
Junction to Ambient (θJA) 230°C/W Junction to Case (θJC) 76°C/W
6 Thin WLP PACKAGE CODE N60B1+1
Outline Number
21-0744
Land Pattern Number Refer to
Application Note 1891 Thermal Resistance, Multi-Layer Board:
Junction to Ambient (θJA) 98°C/W For the latest package outline information and land patterns (footprints), go to
www.analog.com/packages
. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to
www.analog.com/thermal-tutorial
. www.analog.com Analog Devices │ 2