Datasheet TLV9152 (Texas Instruments) - 10

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TLV9151, TL V9152, TLV9154
SBOS986E – OCTOBER 2019 – REVISED JANUARY 2022
www.ti.com 6.5 Thermal Information for Dual Channel TLV9152, TLV9152S D DDF DGK DSG PW RUG THERMAL METRIC
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UNIT (SOIC) (SOT-23) (VSSOP) (WSON) (TSSOP) (X2QFN) 8 PINS 8 PINS 8 PINS 8 PINS 8 PINS 10 PINS
Junction-to-ambient thermal RθJA 138.7 143.5 176.5 77.6 185.1 142.3 °C/W resistance Junction-to-case (top) thermal RθJC(top) 78.7 79.9 68.1 93.7 74.0 53.5 °C/W resistance Junction-to-board thermal RθJB 82.2 61.6 98.2 43.9 115.7 68.5 °C/W resistance Junction-to-top ψJT 27.8 5.7 12.0 4.4 12.3 1.0 °C/W characterization parameter Junction-to-board ψJB 81.4 61.3 96.7 43.9 114.0 68.4 °C/W characterization parameter Junction-to-case (bottom) RθJC(bot) N/A N/A N/A 19.0 N/A N/A °C/W thermal resistance (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.6 Thermal Information for Quad Channel TLV9154 D DYY PW RUC THERMAL METRIC
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UNIT (SOIC) (SOT-23) (TSSOP) (X2QFN) 14 PINS 14 PINS 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 101.4 110.6 131.4 125.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 57.6 53.7 51.8 39.8 °C/W RθJB Junction-to-board thermal resistance 57.3 35.3 75.8 68.0 °C/W ψJT Junction-to-top characterization parameter 18.5 2.2 7.9 0.8 °C/W ψJB Junction-to-board characterization parameter 56.9 35.0 74.8 67.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TLV9151 TLV9152 TLV9154 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information for Single Channel 6.5 Thermal Information for Dual Channel 6.6 Thermal Information for Quad Channel 6.7 Electrical Characteristics 6.8 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 EMI Rejection 7.3.2 Thermal Protection 7.3.3 Capacitive Load and Stability 7.3.4 Common-Mode Voltage Range 7.3.5 Phase Reversal Protection 7.3.6 Electrical Overstress 7.3.7 Overload Recovery 7.3.8 Typical Specifications and Distributions 7.3.9 Packages With an Exposed Thermal Pad 7.3.10 Shutdown 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 Low-Side Current Measurement 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curves 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 TINA-TI™ (Free Software Download) 11.1.1.2 TI Precision Designs 11.2 Documentation Support 11.2.1 Related Documentation 11.3 Receiving Notification of Documentation Updates 11.4 Support Resources 11.5 Trademarks 11.6 Electrostatic Discharge Caution 11.7 Glossary 12 Mechanical, Packaging, and Orderable Information