Datasheet SA571 (ON Semiconductor) - 7
| 制造商 | ON Semiconductor |
| 描述 | Compandor |
| 页数 / 页 | 12 / 7 — SA571. Figure 10. Rectifier Accuracy. Figure 9. Simplified Rectifier … |
| 文件格式/大小 | PDF / 230 Kb |
| 文件语言 | 英语 |
SA571. Figure 10. Rectifier Accuracy. Figure 9. Simplified Rectifier Schematic. Figure 11. Rectifier Frequency Response vs
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SA571
Figure 9 shows the rectifier circuit in more detail. The op the error of the input bias current. For highest accuracy, the amp is a one−stage op amp, biased so that only one output rectifier should be coupled capacitively. At high input levels device is on at a time. The non−inverting input, (the base of the b of the PNP Q6 will begin to suffer, and there will be an Q1), which is shown grounded, is actually tied to the internal increasing error until the circuit saturates. Saturation can be 1.8 V, VREF. The inverting input is tied to the op amp output, avoided by limiting the current into the rectifier input to (the emitters of Q5 and Q6), and the input summing resistor 250 mA. If necessary, an external resistor may be placed in R1. The single diode between the bases of Q5 and Q6 assures series with R1 to limit the current to this value. Figure 10 that only one device is on at a time. To detect the output shows the rectifier accuracy vs. input level at a frequency of current of the op amp, we simply use the collector currents 1.0 kHz. of the output devices Q5 and Q6. Q6 will conduct when the input swings positive and Q5 conducts when the input +1 swings negative. The collector currents will be in error by the a of Q5 or Q6 on negative or positive signal swings, respectively. ICs such as this have typical NPN b’s of 200 0 and PNP b’s of 40. The a’s of 0.995 and 0.975 will produce errors of 0.5% on negative swings and 2.5% on positive ERROR GAIN dB swings. The 1.5% average of these errors yields a mere 0.13 dB gain error. −1 −40 −20 0 RECTIFIER INPUT dBm V+
Figure 10. Rectifier Accuracy
Q3 Q7 At very high frequencies, the response of the rectifier will Q4 fall off. The roll−off will be more pronounced at lower input Q5 R1 levels due to the increasing amount of gain required to D1 10kW switch between Q5 or Q6 conducting. The rectifier Q1 Q2 VIN R frequency response for input levels of 0 dBm, −20 dBm, and S 10kW −40 dBm is shown in Figure 11. The response at all three Q6 Q8 levels is flat to well above the audio range. I Q 1 I2 9 CR V− INPUT = 0dBm V avg 0 NOTE: I + 2 IN −20dBm G R 1 3
Figure 9. Simplified Rectifier Schematic
−40dBm GAIN ERROR (dB) At very low input signal levels the bias current of Q2, (typically 50 nA), will become significant as it must be 10k 1MEG supplied by Q FREQUENCY (Hz) 5. Another low level error can be caused by DC coupling into the rectifier. If an offset voltage exists between
Figure 11. Rectifier Frequency Response vs.
the VIN input pin and the base of Q2, an error current of
Input Level
VOS/R1 will be generated. A mere 1.0 mV of offset will cause an input current of 100 nA which will produce twice
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SA571
Figure 9 shows the rectifier circuit in more detail. The op the error of the input bias current. For highest accuracy, the amp is a one−stage op amp, biased so that only one output rectifier should be coupled capacitively. At high input levels device is on at a time. The non−inverting input, (the base of the b of the PNP Q6 will begin to suffer, and there will be an Q1), which is shown grounded, is actually tied to the internal increasing error until the circuit saturates. Saturation can be 1.8 V, VREF. The inverting input is tied to the op amp output, avoided by limiting the current into the rectifier input to (the emitters of Q5 and Q6), and the input summing resistor 250 mA. If necessary, an external resistor may be placed in R1. The single diode between the bases of Q5 and Q6 assures series with R1 to limit the current to this value. Figure 10 that only one device is on at a time. To detect the output shows the rectifier accuracy vs. input level at a frequency of current of the op amp, we simply use the collector currents 1.0 kHz. of the output devices Q5 and Q6. Q6 will conduct when the input swings positive and Q5 conducts when the input +1 swings negative. The collector currents will be in error by the a of Q5 or Q6 on negative or positive signal swings, respectively. ICs such as this have typical NPN b’s of 200 0 and PNP b’s of 40. The a’s of 0.995 and 0.975 will produce errors of 0.5% on negative swings and 2.5% on positive ERROR GAIN dB swings. The 1.5% average of these errors yields a mere 0.13 dB gain error. −1 −40 −20 0 RECTIFIER INPUT dBm V+
Figure 10. Rectifier Accuracy
Q3 Q7 At very high frequencies, the response of the rectifier will Q4 fall off. The roll−off will be more pronounced at lower input Q5 R1 levels due to the increasing amount of gain required to D1 10kW switch between Q5 or Q6 conducting. The rectifier Q1 Q2 VIN R frequency response for input levels of 0 dBm, −20 dBm, and S 10kW −40 dBm is shown in Figure 11. The response at all three Q6 Q8 levels is flat to well above the audio range. I Q 1 I2 9 CR V− INPUT = 0dBm V avg 0 NOTE: I + 2 IN −20dBm G R 1 3
Figure 9. Simplified Rectifier Schematic
−40dBm GAIN ERROR (dB) At very low input signal levels the bias current of Q2, (typically 50 nA), will become significant as it must be 10k 1MEG supplied by Q FREQUENCY (Hz) 5. Another low level error can be caused by DC coupling into the rectifier. If an offset voltage exists between
Figure 11. Rectifier Frequency Response vs.
the VIN input pin and the base of Q2, an error current of
Input Level
VOS/R1 will be generated. A mere 1.0 mV of offset will cause an input current of 100 nA which will produce twice
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