Datasheet FL7921R (ON Semiconductor) - 7
| 制造商 | ON Semiconductor |
| 描述 | Integrated Critical-Mode PFC and Quasi-Resonant Current-Mode PWM Lighting Controller |
| 页数 / 页 | 21 / 7 — FL7921R. ELECTRICAL CHARACTERISTICS. Symbol. Parameter. Conditions. Min. … |
| 文件格式/大小 | PDF / 718 Kb |
| 文件语言 | 英语 |
FL7921R. ELECTRICAL CHARACTERISTICS. Symbol. Parameter. Conditions. Min. Typ. Max. Unit. Voltage Error Amplifier Section
该数据表的模型线
文件文字版本
link to page 9
FL7921R ELECTRICAL CHARACTERISTICS
(VDD = 15 V and TA = −40~105C, unless otherwise noted) (continued)
Symbol Parameter Conditions Min Typ Max Unit Voltage Error Amplifier Section
VRATIO Clamp High Output Voltage Ratio (Note 4) VINVH / VREF, 1.06 − 1.14 V/V RANGE = Open VINVH / VREF, 1.04 − 1.08 RANGE = Ground VINV−L Clamp Low Feedback Voltage 2.25 2.35 2.45 V VINV−OVP Over−Voltage Protection for INV Input RANGE = Open − 2.90 2.95 V RANGE = Ground − 2.75 2.80 tINV−OVP Over−Voltage Protection Debounce Time 50 70 90 ms VINV−UVP Under−Voltage Protection for INV Input 0.35 0.45 0.55 V tINV−UVP Under−Voltage Protection Debounce Time 50 70 90 ms VINV−BO PWM and PFC Off Threshold for Brownout 1.15 1.20 1.25 V Protection VCOMP−BO Limited Voltage on COMP Pin for Brownout 1.55 1.60 1.65 V Protection VCOMP Comparator Output High Voltage TA = 25C 4.8 6.0 V VOZ Zero Duty Cycle Voltage on COMP Pin 1.10 1.25 1.40 V ICOMP Comparator Output Source Current VINV = 2.3 V, 15 30 45 mA VCOMP = 1.5 V VINV = 1.5 V, TA = 25C 0.50 0.75 1.00 mA Comparator Output Sink Current RANGE = Open, 20 30 40 mA VINV = 2.75 V, VCOMP = 5 V, TA = 25C RANGE = Ground, 20 30 40 VINV = 2.65 V, VCOMP = 5 V
PFC Current Sense Section
VCSPFC Threshold Voltage for Peak Current VCOMP = 5 V − 0.82 − V Cycle−by−Cycle Limit tPD Propagation Delay − 110 200 ns tBNK Leading−Edge Blanking Time 110 180 250 ns AV CSPFC Compensation Ratio for THD 0.90 0.95 1.00 V/V
PFC Output Section
VZ PFC Gate Output Clamping Voltage VDD = 25 V 14.0 15.5 17.0 V VOL PFC Gate Output Voltage Low VDD = 15 V, IO = 100 mA − − 1.5 V VOH PFC Gate Output Voltage High VDD = 15 V, IO = 100 mA 8 − − V tR PFC Gate Output Rising Time VDD = 12 V, CL = 3 nF, 30 65 100 ns 20~80% tF PFC Gate Output Falling Time VDD = 12 V, CL = 3 nF, 30 50 70 ns 80~20%
PFC Zero−Current Detection Section
VZCD Input Threshold Voltage Rising Edge VZCD Increasing 1.9 2.1 2.3 V VZCD−HYST Threshold Voltage Hysteresis VZCD Decreasing 0.25 0.35 0.45 V VZCD−HIGH Upper Clamp Voltage IZCD = 3 mA 8 10 − V VZCD−LOW Lower Clamp Voltage 0.40 0.65 0.90 V VZCD−SSC Starting Source Current Threshold Voltage 1.3 1.4 1.5 V
www.onsemi.com 7
FL7921R ELECTRICAL CHARACTERISTICS
(VDD = 15 V and TA = −40~105C, unless otherwise noted) (continued)
Symbol Parameter Conditions Min Typ Max Unit Voltage Error Amplifier Section
VRATIO Clamp High Output Voltage Ratio (Note 4) VINVH / VREF, 1.06 − 1.14 V/V RANGE = Open VINVH / VREF, 1.04 − 1.08 RANGE = Ground VINV−L Clamp Low Feedback Voltage 2.25 2.35 2.45 V VINV−OVP Over−Voltage Protection for INV Input RANGE = Open − 2.90 2.95 V RANGE = Ground − 2.75 2.80 tINV−OVP Over−Voltage Protection Debounce Time 50 70 90 ms VINV−UVP Under−Voltage Protection for INV Input 0.35 0.45 0.55 V tINV−UVP Under−Voltage Protection Debounce Time 50 70 90 ms VINV−BO PWM and PFC Off Threshold for Brownout 1.15 1.20 1.25 V Protection VCOMP−BO Limited Voltage on COMP Pin for Brownout 1.55 1.60 1.65 V Protection VCOMP Comparator Output High Voltage TA = 25C 4.8 6.0 V VOZ Zero Duty Cycle Voltage on COMP Pin 1.10 1.25 1.40 V ICOMP Comparator Output Source Current VINV = 2.3 V, 15 30 45 mA VCOMP = 1.5 V VINV = 1.5 V, TA = 25C 0.50 0.75 1.00 mA Comparator Output Sink Current RANGE = Open, 20 30 40 mA VINV = 2.75 V, VCOMP = 5 V, TA = 25C RANGE = Ground, 20 30 40 VINV = 2.65 V, VCOMP = 5 V
PFC Current Sense Section
VCSPFC Threshold Voltage for Peak Current VCOMP = 5 V − 0.82 − V Cycle−by−Cycle Limit tPD Propagation Delay − 110 200 ns tBNK Leading−Edge Blanking Time 110 180 250 ns AV CSPFC Compensation Ratio for THD 0.90 0.95 1.00 V/V
PFC Output Section
VZ PFC Gate Output Clamping Voltage VDD = 25 V 14.0 15.5 17.0 V VOL PFC Gate Output Voltage Low VDD = 15 V, IO = 100 mA − − 1.5 V VOH PFC Gate Output Voltage High VDD = 15 V, IO = 100 mA 8 − − V tR PFC Gate Output Rising Time VDD = 12 V, CL = 3 nF, 30 65 100 ns 20~80% tF PFC Gate Output Falling Time VDD = 12 V, CL = 3 nF, 30 50 70 ns 80~20%
PFC Zero−Current Detection Section
VZCD Input Threshold Voltage Rising Edge VZCD Increasing 1.9 2.1 2.3 V VZCD−HYST Threshold Voltage Hysteresis VZCD Decreasing 0.25 0.35 0.45 V VZCD−HIGH Upper Clamp Voltage IZCD = 3 mA 8 10 − V VZCD−LOW Lower Clamp Voltage 0.40 0.65 0.90 V VZCD−SSC Starting Source Current Threshold Voltage 1.3 1.4 1.5 V
www.onsemi.com 7