Datasheet MCP601, MCP601R, MCP602, MCP603, MCP604 (Microchip) - 2

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MCP601/1R/2/3/4 1.0 ELECTRICAL † Notice:
Stresses above those listed under “Absolute
CHARACTERISTICS
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those
Absolute Maximum Ratings †
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended VDD – VSS ..7.0V periods may affect device reliability. Current at Input Pins ...±2 mA
††
See
Section 4.1.2 “Input Voltage and Current Limits”
. Analog Inputs (VIN+, VIN–)
††
.. VSS – 1.0V to VDD + 1.0V All Other Inputs and Outputs ... VSS – 0.3V to VDD + 0.3V Difference Input Voltage .. |VDD – VSS| Output Short Circuit Current ...Continuous Current at Output and Supply Pins ..±30 mA Storage Temperature.. –65°C to +150°C Maximum Junction Temperature (TJ) ..+150°C ESD Protection On All Pins (HBM; MM) .. ≥ 3 kV; 200V
DC CHARACTERISTICS Electrical Specifications:
Unless otherwise specified, TA = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, and RL = 100 kΩ to VL, and CS is tied low. (Refer to Figure 1-2 and Figure 1-3).
Parameters Sym Min Typ Max Units Conditions Input Offset
Input Offset Voltage VOS -2 ±0.7 +2 mV Industrial Temperature VOS -3 ±1 +3 mV TA = -40°C to +85°C
(Note 1 )
Extended Temperature VOS -4.5 ±1 +4.5 mV TA = -40°C to +125°C
(Note 1)
Input Offset Temperature Drift ΔVOS/ΔTA — ±2.5 — µV/°C TA = -40°C to +125°C Power Supply Rejection PSRR 80 88 — dB VDD = 2.7V to 5.5V
Input Current and Impedance
Input Bias Current IB — 1 — pA Industrial Temperature IB — 20 60 pA TA = +85°C
(Note 1)
Extended Temperature IB — 450 5000 pA TA = +125°C
(Note 1 )
Input Offset Current IOS — ±1 — pA Common Mode Input Impedance ZCM — 1013||6 — Ω||pF Differential Input Impedance ZDIFF — 1013||3 — Ω||pF
Common Mode
Common Mode Input Range VCMR VSS – 0.3 — VDD – 1.2 V Common Mode Rejection Ratio CMRR 75 90 — dB VDD = 5.0V, VCM = -0.3V to 3.8V
Open-loop Gain
DC Open-loop Gain (large signal) AOL 100 115 — dB RL = 25 kΩ to VL, VOUT = 0.1V to VDD – 0.1V AOL 95 110 — dB RL = 5 kΩ to VL, VOUT = 0.1V to VDD – 0.1V
Output
Maximum Output Voltage Swing VOL, VOH VSS + 15 — VDD – 20 mV RL = 25 kΩ to VL, Output overdrive = 0.5V VOL, VOH VSS + 45 — VDD – 60 mV RL = 5 kΩ to VL, Output overdrive = 0.5V Linear Output Voltage Swing VOUT VSS + 100 — VDD – 100 mV RL = 25 kΩ to VL, AOL ≥ 100 dB VOUT VSS + 100 — VDD – 100 mV RL = 5 kΩ to VL, AOL ≥ 95 dB Output Short Circuit Current ISC — ±22 — mA VDD = 5.5V ISC — ±12 — mA VDD = 2.7V
Power Supply
Supply Voltage VDD 2.7 — 6.0 V
(Note 2)
Quiescent Current per Amplifier IQ — 230 325 µA IO = 0
Note 1:
These specifications are not tested in either the SOT-23 or TSSOP packages with date codes older than YYWW = 0408. In these cases, the minimum and maximum values are by design and characterization only.
2:
All parts with date codes November 2007 and later have been screened to ensure operation at VDD=6.0V. However, the other minimum and maximum specifications are measured at 1.4V and/or 5.5V. DS21314G-page 2 © 2007 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics FIGURE 1-1: MCP603 Chip Select (CS) Timing Diagram. 1.1 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. 2.0 Typical Performance Curves FIGURE 2-1: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-2: Slew Rate vs. Temperature. FIGURE 2-3: Gain Bandwidth Product, Phase Margin vs. Temperature. FIGURE 2-4: Quiescent Current vs. Supply Voltage. FIGURE 2-5: Quiescent Current vs. Temperature. FIGURE 2-6: Input Noise Voltage Density vs. Frequency. FIGURE 2-7: Input Offset Voltage. FIGURE 2-8: Input Offset Voltage vs. Temperature. FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.7V. FIGURE 2-10: Input Offset Voltage Drift. FIGURE 2-11: CMRR, PSRR vs. Temperature. FIGURE 2-12: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-13: Channel-to-Channel Separation vs. Frequency. FIGURE 2-14: Input Bias Current, Input Offset Current vs. Ambient Temperature. FIGURE 2-15: DC Open-Loop Gain vs. Load Resistance. FIGURE 2-16: CMRR, PSRR vs. Frequency. FIGURE 2-17: Input Bias Current, Input Offset Current vs. Common Mode Input Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Supply Voltage. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Load Resistance. FIGURE 2-20: Output Voltage Headroom vs. Output Current. FIGURE 2-21: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-22: DC Open-Loop Gain vs. Temperature. FIGURE 2-23: Output Voltage Headroom vs. Temperature. FIGURE 2-24: Output Short-Circuit Current vs. Supply Voltage. FIGURE 2-25: Large Signal Non-Inverting Pulse Response. FIGURE 2-26: Small Signal Non-Inverting Pulse Response. FIGURE 2-27: Chip Select Timing (MCP603). FIGURE 2-28: Large Signal Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Quiescent Current Through VSS vs. Chip Select Voltage (MCP603). FIGURE 2-31: Chip Select Pin Input Current vs. Chip Select Voltage. FIGURE 2-32: Hysteresis of Chip Select’s Internal Switch. FIGURE 2-33: The MCP601/1R/2/3/4 family of op amps shows no phase reversal under input overdrive. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table For Single Op Amps TABLE 3-2: Pin Function Table For Dual And Quad Op Amps 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Chip Select Digital Input 3.4 Power Supply Pins 4.0 Applications Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Unity Gain Buffer has a Limited VOUT Range. 4.2 Rail-to-Rail Output 4.3 MCP603 Chip Select 4.4 Capacitive Loads FIGURE 4-4: Output resistor RISO stabilizes large capacitive loads. FIGURE 4-5: Recommended RISO values for capacitive loads. 4.5 Supply Bypass 4.6 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.7 PCB Surface Leakage FIGURE 4-7: Example Guard Ring layout. 4.8 Typical Applications FIGURE 4-8: Second-Order, Low-Pass Sallen-Key Filter. FIGURE 4-9: Second-Order, Low-Pass Multiple-Feedback Filter. FIGURE 4-10: Three-Op Amp Instrumentation Amplifier. FIGURE 4-11: Two-Op Amp Instrumentation Amplifier. FIGURE 4-12: Photovoltaic Mode Detector. FIGURE 4-13: Photoconductive Mode Detector. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Simulatior Tool 5.4 MAPS (Microchip Advanced Part Selector) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information