Datasheet AD7617 (Analog Devices) - 8

Data Sheet AD7617 RESET_WAIT DEVICE_SETUP VCC VDRIVE RESET RESET_LOW CONVST BUSY tWRITE CS RESET_SETUP RESET_HOLD REFSEL SER/PAR, SER1W ALL MODES HW_RNGSEL0, MODE RANGE SETTING IN HW MODE HW_RNGSEL1 CRCEN, BURST SEQEN, OS0 TO OS2 HARDWARE CHSEL0 TO CHSEL2 CH MODE ONLY x CHy CHz
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ADC INTERNAL ACTION ACQx CONVx ACQy CONVy
16077- Figure 3. Reset Timing
Parallel Mode Timing Specifications Table 3. Parameter Min Typ Max Unit Description
tRD_SETUP 10 ns CS falling edge to RD falling edge setup time tRD_HOLD 10 ns RD rising edge to CS rising edge hold time tRD_HIGH 10 ns RD high pulse width tRD_LOW 30 ns RD low pulse width tDOUT_SETUP 30 ns Data access time after falling edge of RD tDOUT_3STATE 11 ns CS rising edge to DBx high impedance tWR_SETUP 10 ns CS to WR setup time tWR_HIGH 20 ns WR high pulse width tWR_LOW 30 ns WR low pulse width tWR_HOLD 10 ns WR hold time tDIN_SETUP 30 ns Configuration data to WR setup time tDIN_HOLD 10 ns Configuration data to WR hold time tCONF_SETTLE 20 ns Configuration data settle time, WR rising edge to CONVST rising edge Rev. 0 | Page 7 of 51 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Universal Timing Specifications Parallel Mode Timing Specifications Serial Mode Timing Specifications ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Channel Selection Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE SHUTDOWN MODE DIGITAL FILTER APPLICATIONS INFORMATION FUNCTIONALITY OVERVIEW POWER SUPPLIES TYPICAL CONNECTIONS DEVICE CONFIGURATION OPERATIONAL MODE INTERNAL/EXTERNAL REFERENCE DIGITAL INTERFACE HARDWARE MODE SOFTWARE MODE RESET FUNCTIONALITY PIN FUNCTION OVERVIEW DIGITAL INTERFACE CHANNEL SELECTION Hardware Mode Software Mode PARALLEL INTERFACE Reading Conversion Results Writing Register Data Reading Register Data SERIAL INTERFACE Reading Conversion Results Writing Register Data Reading Register Data SEQUENCER HARDWARE MODE SEQUENCER SOFTWARE MODE SEQUENCER BURST SEQUENCER Hardware Mode Burst Software Mode Burst DIAGNOSTICS DIAGNOSTIC CHANNELS INTERFACE SELF TEST CRC REGISTER SUMMARY ADDRESSING REGISTERS CONFIGURATION REGISTER CHANNEL REGISTER INPUT RANGE REGISTERS Input Range Register A1 Input Range Register A2 Input Range Register B1 Input Range Register B2 SEQUENCER STACK REGISTERS STATUS REGISTER OUTLINE DIMENSIONS ORDERING GUIDE