Data SheetAD7605-4ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCETable 4. Thermal performance is directly linked to printed circuit board ParameterRating (PCB) design and operating environment. Careful attention to AV PCB thermal design is required. CC to AGND −0.3 V to +7 V VDRIVE to AGND −0.3 V to AVCC + 0.3 V θJA is the natural convection junction to ambient thermal Analog Input Voltage to AGND1 ±16.5 V resistance, measured in a one cubic foot sealed enclosure. θJC is Digital Input Voltage to AGND −0.3 V to VDRIVE + 0.3 V the junction to case thermal resistance. Digital Output Voltage to AGND −0.3 V to VDRIVE + 0.3 V REFIN/REFOUT to AGND −0.3 V to AV Table 5. Thermal Resistance CC + 0.3 V 11 Input Current to Any Pin Except Supplies1 ±10 mA Package TypeθJAθJCUnit Operating Temperature Range −40°C to +85°C ST-64-2 45.5 9.5 °C/W Storage Temperature Range −65°C to +150°C 1 The thermal resistance specifications are based on the device being Junction Temperature 150°C mounted to a JEDEC 2P2S compliant, 4-layer PCB, as per JEDEC Standard Pb/Sn Temperature, Soldering JESD51-7. Reflow (10 sec to 30 sec) 240 (+0)°C Pb-Free Temperature, Soldering Reflow 260 (+0)°C ESD CAUTION ESD All Pins Except Analog Inputs 2 kV Analog Input Pins Only 7 kV 1 Transient currents of up to 100 mA do not cause silicon controlled rectifier (SCR) latch-up. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 9 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter Track-and-Hold Amplifiers ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE TYPICAL CONNECTION DIAGRAM POWER-DOWN MODES CONVERSION CONTROL Simultaneous Sampling on All Analog Input Channels Simultaneously Sampling Two Sets of Channels APPLICATIONS INFORMATION PARALLEL INTERFACE (/SER/BYTE SEL = 0) PARALLEL BYTE (/SER/BYTE SEL = 1, DB15/BYTE SEL = 1) SERIAL INTERFACE (/SER/BYTE SEL = 1) READING DURING CONVERSION LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE