Datasheet LTC1860L, LTC1861L (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | µPower, 3V, 12-Bit, 150ksps 1- and 2-Channel ADCs in MSOP |
| 页数 / 页 | 12 / 6 — TYPICAL PERFOR A CE CHARACTERISTICS. Change in Gain Error vs Temperature. … |
| 文件格式/大小 | PDF / 240 Kb |
| 文件语言 | 英语 |
TYPICAL PERFOR A CE CHARACTERISTICS. Change in Gain Error vs Temperature. 4096 Point FFT Non Averaged. SNR vs fIN
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LTC1860L/LTC1861L
W U TYPICAL PERFOR A CE CHARACTERISTICS Change in Gain Error vs Temperature 4096 Point FFT Non Averaged SNR vs fIN
1.0 0 80 fS = 150kHz f 0.8 –10 IN = 1kHz VCC = 2.7V fS = 150kHz 70 V –20 0.6 REF = 2.5V TA = 25°C –30 VCC = 3V 60 0.4 V –40 REF = 3V 50 0.2 –50 0 –60 40 –0.2 –70 SNR (dB) 30 AMPLITUDE (dB) –80 –0.4 fS = 150kHz 20 –90 TA = 25°C CHANGE IN GAIN ERROR (LSB) –0.6 –100 VCC = 3V 10 –0.8 VIN = 0dB –110 VREF = 3V –1.0 0 –120 –50 –25 0 25 50 75 100 125 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 1 10 100 TEMPERATURE (°C) fIN (kHz) fIN (kHz) 1860L/61L G13 1860L/61L G14 1860L/61L G15
Signal-to-(Noise + Distortion) Total Harmonic Distortion Spurious Free Dynamic Range vs fIN vs fIN vs fIN
80 0 100 fS = 150kHz –10 90 70 TA = 25°C V –20 CC = 3V 80 60 VIN = 0dB –30 V 70 REF = 3V 50 –40 60 40 –50 50 THD (dB) SINAD (dB) –60 SFDR (dB) 40 30 f f S = 150kHz –70 30 S = 150kHz 20 T T A = 25°C A = 25°C –80 20 V V CC = 3V CC = 3V 10 V V IN = 0dB IN = 0dB –90 10 V V REF = 3V REF = 3V 0 –100 0 1 10 100 1 10 100 1 10 100 f f IN (kHz) fIN (kHz) IN (kHz) 1860L/61L G18 1860L/61L G16 1860L/61L G17
U U U PI FU CTIO S LTC1860L VREF (Pin 1):
Reference Input. The reference input defines high after the A/D conversion is finished, the part powers the span of the A/D converter and must be kept free of down. A logic low on this input enables the SDO pin, noise with respect to GND. allowing the data to be shifted out.
IN+, IN– (Pins 2, 3):
Analog Inputs. These inputs must be
SDO (Pin 6):
Digital Data Output. The A/D conversion free of noise with respect to GND. result is shifted out of this pin.
GND (Pin 4):
Analog Ground. GND should be tied directly
SCK (Pin 7):
Shift Clock Input. This clock synchronizes the to an analog ground plane. serial data transfer.
CONV (Pin 5):
Convert Input. A logic high on this input
VCC (Pin 8):
Positive Supply. This supply must be kept starts the A/D conversion process. If the CONV input is left free of noise and ripple by bypassing directly to the analog ground plane. 18601Lf 6
W U TYPICAL PERFOR A CE CHARACTERISTICS Change in Gain Error vs Temperature 4096 Point FFT Non Averaged SNR vs fIN
1.0 0 80 fS = 150kHz f 0.8 –10 IN = 1kHz VCC = 2.7V fS = 150kHz 70 V –20 0.6 REF = 2.5V TA = 25°C –30 VCC = 3V 60 0.4 V –40 REF = 3V 50 0.2 –50 0 –60 40 –0.2 –70 SNR (dB) 30 AMPLITUDE (dB) –80 –0.4 fS = 150kHz 20 –90 TA = 25°C CHANGE IN GAIN ERROR (LSB) –0.6 –100 VCC = 3V 10 –0.8 VIN = 0dB –110 VREF = 3V –1.0 0 –120 –50 –25 0 25 50 75 100 125 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 1 10 100 TEMPERATURE (°C) fIN (kHz) fIN (kHz) 1860L/61L G13 1860L/61L G14 1860L/61L G15
Signal-to-(Noise + Distortion) Total Harmonic Distortion Spurious Free Dynamic Range vs fIN vs fIN vs fIN
80 0 100 fS = 150kHz –10 90 70 TA = 25°C V –20 CC = 3V 80 60 VIN = 0dB –30 V 70 REF = 3V 50 –40 60 40 –50 50 THD (dB) SINAD (dB) –60 SFDR (dB) 40 30 f f S = 150kHz –70 30 S = 150kHz 20 T T A = 25°C A = 25°C –80 20 V V CC = 3V CC = 3V 10 V V IN = 0dB IN = 0dB –90 10 V V REF = 3V REF = 3V 0 –100 0 1 10 100 1 10 100 1 10 100 f f IN (kHz) fIN (kHz) IN (kHz) 1860L/61L G18 1860L/61L G16 1860L/61L G17
U U U PI FU CTIO S LTC1860L VREF (Pin 1):
Reference Input. The reference input defines high after the A/D conversion is finished, the part powers the span of the A/D converter and must be kept free of down. A logic low on this input enables the SDO pin, noise with respect to GND. allowing the data to be shifted out.
IN+, IN– (Pins 2, 3):
Analog Inputs. These inputs must be
SDO (Pin 6):
Digital Data Output. The A/D conversion free of noise with respect to GND. result is shifted out of this pin.
GND (Pin 4):
Analog Ground. GND should be tied directly
SCK (Pin 7):
Shift Clock Input. This clock synchronizes the to an analog ground plane. serial data transfer.
CONV (Pin 5):
Convert Input. A logic high on this input
VCC (Pin 8):
Positive Supply. This supply must be kept starts the A/D conversion process. If the CONV input is left free of noise and ripple by bypassing directly to the analog ground plane. 18601Lf 6