Datasheet AD7912, AD7922 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 12-Bit A/D Converter |
| 页数 / 页 | 32 / 3 — AD7912/AD7922. SPECIFICATIONS AD7912 SPECIFICATIONS. Table 1. Parameter. … |
| 文件格式/大小 | PDF / 396 Kb |
| 文件语言 | 英语 |
AD7912/AD7922. SPECIFICATIONS AD7912 SPECIFICATIONS. Table 1. Parameter. A Grade1. Unit. Test Conditions/Comments
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AD7912/AD7922 SPECIFICATIONS AD7912 SPECIFICATIONS
Temperature range for A Grade from −40°C to +85°C. VDD = 2.35 V to 5.25 V, fSCLK = 18 MHz, fSAMPLE = 1 MSPS; TA = TMIN to TMAX, unless otherwise noted.
Table 1. Parameter A Grade1 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to- Noise + Distortion (SINAD)2 61 dB min Total Harmonic Distortion (THD)2 −71 dB max Peak Harmonic or Spurious Noise (SFDR)2 −72 dB max Intermodulation Distortion (IMD)2 Second-Order Terms −82 dB typ fa = 100.73 kHz, fb = 90.7 kHz Third-Order Terms −83 dB typ fa = 100.73 kHz, fb = 90.7 kHz Aperture Delay 10 ns typ Aperture Jitter 30 ps typ Channel-to-Channel Isolation2 90 dB typ Full Power Bandwidth 8.5 MHz typ @ 3 dB 1.5 MHz typ @ 0.1 dB DC ACCURACY Resolution 10 Bits Integral Nonlinearity2 ±0.5 LSB max Differential Nonlinearity2 ±0.5 LSB max Guaranteed no missed codes to 10 bits Offset Error2 ±0.5 LSB max Offset Error Match2, 3 ±0.3 LSB max Gain Error2 ±0.5 LSB max Gain Error Match2, 3 ±0.3 LSB max Total Unadjusted Error (TUE)2 ±0.5 LSB max ANALOG INPUT Input Voltage Ranges 0 to VDD V DC Leakage Current ±0.3 µA max Input Capacitance 20 pF typ LOGIC INPUTS Input High Voltage, VINH 0.7 (VDD) V min 2.35 V ≤ VDD ≤ 2.7 V 2 V min 2.7 V < VDD ≤ 5.25 V Input Low Voltage, VINL 0.3 V max VDD = 2.35 V 0.2 (VDD) V max 2.35 V < VDD ≤ 2.7 V 0.8 V max 2.7 V < VDD ≤ 5.25 V Input Current, IIN, SCLK Pin ±0.3 µA max Typically 8 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±0.3 µA max Input Current, IIN, DIN Pin ±0.3 µA max Input Capacitance, C 3 IN 5 pF max LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 µA, VDD = 2.35 V to 5.25 V Output Low Voltage, VOL 0.2 V max ISINK = 200 µA Floating-State Leakage Current ±0.3 µA max Floating-State Output Capacitance3 5 pF max Output Coding Straight (natural) binary Rev. 0 | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS AD7912 SPECIFICATIONS AD7922 SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS DIN INPUT DOUT OUTPUT MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME DAISY-CHAIN MODE DAISY-CHAIN EXAMPLE POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7912/AD7922 to TMS320C541 Interface AD7912/AD7922 to ADSP-218x AD7912/AD7922 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING AD7912/AD7922 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
AD7912/AD7922 SPECIFICATIONS AD7912 SPECIFICATIONS
Temperature range for A Grade from −40°C to +85°C. VDD = 2.35 V to 5.25 V, fSCLK = 18 MHz, fSAMPLE = 1 MSPS; TA = TMIN to TMAX, unless otherwise noted.
Table 1. Parameter A Grade1 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to- Noise + Distortion (SINAD)2 61 dB min Total Harmonic Distortion (THD)2 −71 dB max Peak Harmonic or Spurious Noise (SFDR)2 −72 dB max Intermodulation Distortion (IMD)2 Second-Order Terms −82 dB typ fa = 100.73 kHz, fb = 90.7 kHz Third-Order Terms −83 dB typ fa = 100.73 kHz, fb = 90.7 kHz Aperture Delay 10 ns typ Aperture Jitter 30 ps typ Channel-to-Channel Isolation2 90 dB typ Full Power Bandwidth 8.5 MHz typ @ 3 dB 1.5 MHz typ @ 0.1 dB DC ACCURACY Resolution 10 Bits Integral Nonlinearity2 ±0.5 LSB max Differential Nonlinearity2 ±0.5 LSB max Guaranteed no missed codes to 10 bits Offset Error2 ±0.5 LSB max Offset Error Match2, 3 ±0.3 LSB max Gain Error2 ±0.5 LSB max Gain Error Match2, 3 ±0.3 LSB max Total Unadjusted Error (TUE)2 ±0.5 LSB max ANALOG INPUT Input Voltage Ranges 0 to VDD V DC Leakage Current ±0.3 µA max Input Capacitance 20 pF typ LOGIC INPUTS Input High Voltage, VINH 0.7 (VDD) V min 2.35 V ≤ VDD ≤ 2.7 V 2 V min 2.7 V < VDD ≤ 5.25 V Input Low Voltage, VINL 0.3 V max VDD = 2.35 V 0.2 (VDD) V max 2.35 V < VDD ≤ 2.7 V 0.8 V max 2.7 V < VDD ≤ 5.25 V Input Current, IIN, SCLK Pin ±0.3 µA max Typically 8 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±0.3 µA max Input Current, IIN, DIN Pin ±0.3 µA max Input Capacitance, C 3 IN 5 pF max LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 µA, VDD = 2.35 V to 5.25 V Output Low Voltage, VOL 0.2 V max ISINK = 200 µA Floating-State Leakage Current ±0.3 µA max Floating-State Output Capacitance3 5 pF max Output Coding Straight (natural) binary Rev. 0 | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS AD7912 SPECIFICATIONS AD7922 SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS DIN INPUT DOUT OUTPUT MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME DAISY-CHAIN MODE DAISY-CHAIN EXAMPLE POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7912/AD7922 to TMS320C541 Interface AD7912/AD7922 to ADSP-218x AD7912/AD7922 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING AD7912/AD7922 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE