Datasheet AD7732 (Analog Devices)

2-Channel, ±10 V Input Range, High Throughput, 24-Bit ∑-Δ ADC AD7732 FEATURES FUNCTIONAL BLOCK DIAGRAM High resolution ADC REFIN(–) REFIN(+) 24 bits no missing codes AIN0(+) REFERENCE ±0.0015% nonlinearity DETECT Optimized for fast channel switching 18-bit p-p resolution (21 bits effective) at 500 Hz BUFFER 16-bit p-p resolution (19 bits effective) at 2 kHz 24-BIT AIN0(–) 14-bit p-p resolution (18 bits effective) at 15 kHz
Σ−Δ
ADC On-chip per channel system calibration MUX 2 fully differential analog inputs AD7732 Input ranges +5 V, ±5 V, +10 V, ±10 V AIN1(+) Overvoltage tolerant Up to ±16.5 V not affecting adjacent channel CS SCLK Up to ±50 V absolute maximum AIN1(–) CALIBRATION SERIAL CIRCUITRY INTERFACE DIN 3-wire serial interface DOUT SPI™, QSPI™, MICROWIRE™, and DSP compatible Schmitt trigger on logic inputs P0 RESET CLOCK CONTROL Single-supply operation I/O PORT GENERATOR LOGIC SYNC/P1 RDY 5 V analog supply 3 V or 5 V digital supply AGND AV MCLKOUT MCLKIN DGND DD DVDD Package: 28-lead TSSOP
Figure 1.
APPLICATIONS
The differential reference input features “No-Reference” detect
PLCs/DCS
capability. The ADC also supports per channel system
Multiplexing applications
calibration options. The digital serial interface can be
Process control
configured for 3-wire operation and is compatible with
Industrial instrumentation
microcontrollers and digital signal processors. All interface inputs are Schmitt triggered.
GENERAL DESCRIPTION
The part is specified for operation over the extended industrial The AD7732 is a high precision, high throughput analog front temperature range of –40°C to +105°C. end. True 16-bit p-p resolution is achievable with a total conversion time of 500 μs (2 kHz channel switching), making it Other parts in the AD7732 family are the AD7734 and ideally suitable for high resolution multiplexing applications. the AD7738. The part can be configured via a simple digital interface, which The AD7734 is similar to AD7732, but its analog front end allows users to balance the noise performance against data features four single-ended input channels. throughput up to a 15.4 kHz. The AD7738 analog front end is configurable for four fully The analog front end features two fully differential input differential or eight single-ended input channels, features channels with unipolar or true bipolar input ranges to ±10 V 0.625 V to 2.5 V bipolar/unipolar input ranges, and accepts a while operating from a single +5 V analog supply. The part has common-mode input voltage from 200 mV to AVDD – 300 mV. an overrange and underrange detection capability and accepts The AD7738 multiplexer output is pinned out externally, an analog input overvoltage to ±16.5 V without degrading the allowing the user to implement programmable gain or signal performance of the adjacent channels. conditioning before being applied to the ADC.
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY AD7732—SPECIFICATIONS Table 1. (–40°C to +105°C; AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; BIAS (all), REFIN(+) = 2.5 V; REFIN(–) = AGND; RA, RB, RC, RD open circuit; AIN Range = ±10 V; fMCLKIN = 6.144 MHz; unless otherwise noted.) TIMING SPECIFICATIONS Table 2. (AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; Input Logic 0 = 0 V; Logic 1 = DVDD; unless otherwise noted.) ABSOLUTE MAXIMUM RATINGS Table 3. TA = 25°C, unless otherwise noted. TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE AND RESOLUTION SPECIFICATION Chopping Enabled Table 4. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Enabled Table 5. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled Table 6. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled Chopping Disabled Table 7. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Disabled Table 8. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled Table 9. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS Table 10. Pin Function Descriptions—28-Lead TSSOP REGISTER DESCRIPTION Table 11. Register Summary Table 12. Operational Mode Summary Table 13. Input Range Summary Register Access Communications Register Table 14. I/O Port Register Revision Register Test Register ADC Status Register Checksum Register ADC Zero-Scale Calibration Register ADC Full-Scale Register Channel Data Registers Channel Zero-Scale Calibration Registers Channel Full-Scale Calibration Registers Channel Status Registers Channel Setup Registers Table 15. Channel Conversion Time Registers Mode Register DIGITAL INTERFACE DESCRIPTION Hardware Reset Access the AD7732 Registers Single Conversion and Reading Data Dump Mode Continuous Conversion Mode Continuous Read (Continuous Conversion) Mode CIRCUIT DESCRIPTION Analog Front End Analog Input’s Extended Voltage Range Table 16. Extended Input Voltage Range, Nominal Voltage Range ±10 V, 16 Bits, CLAMP = 0 Table 17. Extended Input Voltage Range, Nominal Voltage Range 0 V to +10 V, 16 Bits, CLAMP = 0 Chopping Multiplexer, Conversion, and Data Output Timing Sigma-Delta ADC Frequency Response Voltage Reference Inputs Reference Detect I/O Port Calibration ADC Zero-Scale Self-Calibration Per Channel System Calibration High Common-Mode Voltage Application OUTLINE DIMENSIONS Ordering Guide