Datasheet AD9200 (Analog Devices)

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Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter AD9200 FEATURES
A single clock input is used to control all internal conversion
CMOS 10-Bit, 20 MSPS Sampling A/D Converter
cycles. The digital output data is presented in straight binary
Pin-Compatible with AD876
output format. An out-of-range signal (OTR) indicates an over-
Power Dissipation: 80 mW (3 V Supply)
flow condition which can be used with the most significant bit
Operation Between 2.7 V and 5.5 V Supply
to determine low or high overflow.
Differential Nonlinearity: 0.5 LSB
The AD9200 can operate with supply range from 2.7 V to
Power-Down (Sleep) Mode
5.5 V, ideally suiting it for low power operation in high speed
Three-State Outputs
portable applications.
Out-of-Range Indicator Built-In Clamp Function (DC Restore)
The AD9200 is specified over the industrial (–40°C to +85°C)
Adjustable On-Chip Voltage Reference
and commercial (0°C to +70°C) temperature ranges.
IF Undersampling to 135 MHz PRODUCT HIGHLIGHTS PRODUCT DESCRIPTION Low Power
The AD9200 is a monolithic, single supply, 10-bit, 20 MSPS The AD9200 consumes 80 mW on a 3 V supply (excluding the analog-to-digital converter with an on-chip sample-and-hold reference power). In sleep mode, power is reduced to below amplifier and voltage reference. The AD9200 uses a multistage 5 mW. differential pipeline architecture at 20 MSPS data rates and
Very Small Package
guarantees no missing codes over the full operating temperature The AD9200 is available in both a 28-lead SSOP and 48-lead range. LQFP packages. The input of the AD9200 has been designed to ease the devel-
Pin Compatible with AD876
opment of both imaging and communications systems. The user The AD9200 is pin compatible with the AD876, allowing older can select a variety of input ranges and offsets and can drive the designs to migrate to lower supply voltages. input either single-ended or differentially.
300 MHz On-Board Sample-and-Hold
The sample-and-hold (SHA) amplifier is equally suited for both The versatile SHA input can be configured for either single- multiplexed systems that switch full-scale voltage levels in suc- ended or differential inputs. cessive channels and sampling single-channel inputs at frequen- cies up to and beyond the Nyquist rate. AC coupled input
Out-of-Range Indicator
signals can be shifted to a predetermined level, with an onboard The OTR output bit indicates when the input signal is beyond clamp circuit (AD9200ARS, AD9200KST). The dynamic per- the AD9200’s input range. formance is excellent.
Built-In Clamp Function
The AD9200 has an onboard programmable reference. An Allows dc restoration of video signals with AD9200ARS and external reference can also be chosen to suit the dc accuracy and AD9200KST. temperature drift requirements of the application.
FUNCTIONAL BLOCK DIAGRAM CLAMP CLAMP IN CLK AVDD DRVDD STBY SHA SHA GAIN SHA GAIN SHA GAIN SHA GAIN MODE AIN A/D REFTS A/D D/A A/D D/A A/D D/A THREE- REFBS A/D D/A STATE REFTF CORRECTION LOGIC REFBF OUTPUT BUFFERS OTR VREF D9 1V AD9200 REFSENSE (MSB) D0 (LSB) AVSS DRVSS
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