Datasheet AD5379 (Analog Devices) - 9

制造商Analog Devices
描述40-Channel, 14-Bit, Parallel and Serial Input, Bipolar Voltage-Output DAC
页数 / 页29 / 9 — AD5379. SCLK. t21. SYNC. DIN. D23. D23'. D0'. INPUT WORD FOR DAC N. INPUT …
修订版B
文件格式/大小PDF / 460 Kb
文件语言英语

AD5379. SCLK. t21. SYNC. DIN. D23. D23'. D0'. INPUT WORD FOR DAC N. INPUT WORD FOR DAC N+1. t20. SDO. UNDEFINED. LDAC. t24. t11. BUSY

AD5379 SCLK t21 SYNC DIN D23 D23' D0' INPUT WORD FOR DAC N INPUT WORD FOR DAC N+1 t20 SDO UNDEFINED LDAC t24 t11 BUSY

该数据表的模型线

文件文字版本

AD5379 t1 SCLK 24 48 t t 3 t2 22 t7 t21 t4 SYNC t8 t9 DIN D23 D0 D23' D0' INPUT WORD FOR DAC N INPUT WORD FOR DAC N+1 t20 SDO D23 D0 UNDEFINED INPUT WORD FOR DAC N t t 23 13 LDAC t24 t11 BUSY
03165-005 Figure 5. Serial Interface Timing Diagram (Daisy-Chain Mode) Rev. B | Page 8 of 28 Document Outline FEATURES APPLICATIONS TABLE OF CONTENTS GENERAL DESCRIPTION SPECIFICATIONS AC CHARACTERISTICS TIMING CHARACTERISTICS SERIAL INTERFACE PARALLEL INTERFACE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION DAC ARCHITECTURE—GENERAL CHANNEL GROUPS TRANSFER FUNCTION VBIAS FUNCTION REFERENCE SELECTION Reference Selection Example CALIBRATION Calibration Example CLEAR FUNCTION Hardware Clear Software Clear /BUSY AND /LDAC FUNCTIONS FIFO VS. NON-FIFO OPERATION /BUSY INPUT FUNCTION POWER-ON RESET FUNCTION /RESET INPUT FUNCTION INCREMENT/DECREMENT FUNCTION INTERFACES PARALLEL INTERFACE / CS Pin /WR Pin REG1, REG0 Pins DB13 to DB0 Pins A7 to A0 Pins SERIAL INTERFACE /SYNC , DIN, SCLK DCEN SDO Standalone Mode Daisy-Chain Mode DATA DECODING ADDRESS DECODING POWER SUPPLY DECOUPLING POWER-ON TYPICAL APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE