Datasheet ISL70444SEH (Intersil)

制造商Intersil
描述19MHz Radiation Hardened 40V Quad Rail-to-Rail Input - Output, Low-Power Operational Amplifiers
页数 / 页25 / 1 — 100kΩ. VS ±18V. +2.7V. RIN-. -IN -. to 40V. 10kΩ. OUT. ISL70444. SENSE. …
修订版2017-12-21
文件格式/大小PDF / 2.0 Mb
文件语言英语

100kΩ. VS ±18V. +2.7V. RIN-. -IN -. to 40V. 10kΩ. OUT. ISL70444. SENSE. µV). IN+. +IN. GROUNDED. OUT =. 10 (ILOAD * RSENSE). -10. RREF+. BIASED. LOAD. -20. VREF

Datasheet ISL70444SEH Intersil, 修订版: 2017-12-21

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DATASHEET ISL70444SEH FN8411 19MHz Radiation Hardened 40V Quad Rail-to-Rail Input - Output, Rev.4.00 Jul 6, 2017 Low-Power Operational Amplifiers The ISL70444SEH features four low-power amplifiers Features optimized to provide maximum dynamic range. These op amps feature a unique combination of rail-to-rail operation on • Electrically screened to DLA SMD# 5962-13214 the input and output as well as a slew enhanced front-end that • Acceptance tested to 50krad(Si) (LDR) wafer-by-wafer provides ultra fast slew rates positively proportional to a given step size; thereby increasing accuracy under transient • <5µs recovery from SEE (LETTH = 86.4MeV•cm2/mg) conditions, whether it’s periodic or momentary. It also offers • Unity gain stable low power, low offset voltage, and low temperature drift, • Rail-to-rail input and output making it ideal for applications requiring both high DC accuracy and AC performance. With <5µs recovery for Single • Wide gain·bandwidth product . 19MHz Event Transients (SET) (LETTH = 86.4MeV•cm2/mg), the • Wide single and dual supply range. 2.7V to 40V Max number of filtering components needed is drastically reduced. • Low input offset voltage . 400µV The ISL70444SEH is also immune to single event latch-up because it is fabricated in Intersil’s proprietary PR40 Silicon • Low current consumption (per amplifier) . 1.1mA, Typ On Insulator (SOI) process. • No phase reversal with input overdrive The amplifiers are designed to operate over a single supply • Slew rate range of 2.7V to 40V or a split supply voltage range of ±1.35V to - Large signal . 60V/µs ±20V. Applications for these amplifiers include precision instrumentation, data acquisition, precision power supply • Operating temperature range. .-55°C to +125°C controls, and process controls. • Radiation tolerance The ISL70444SEH is available in a 14 Ld Hermetic Ceramic - High dose rate (50-300rad(Si)/s). 300krad(Si) Flatpack and die forms that operate across the temperature - Low dose rate (0.01rad(Si)/s) . 100krad(Si)* range of -55°C to +125°C. - SEB LETTH (VS = ±21V). 86.4MeV•cm2/mg Related Literature - SEL Immune (SOI Process) * Product capability established by initial characterization. • For a full list of related documents, visit our website - ISL70444SEH product page Applications • Precision instruments • Active filter blocks • Data acquisition • Power supply control • Process control
RF 30 100kΩ VS ±18V +2.7V 20 RIN- -IN - to 40V + V 10kΩ V+ OUT 10 R ISL70444 SENSE R µV) IN+ +IN V- ( 0 + GROUNDED V OS 10kΩ OUT = V 10 (ILOAD * RSENSE) -10 RREF+ BIASED LOAD 100kΩ -20 VREF -30 0 50 100 150 200 250 300 krad (Si)
FIGURE 1. TYPICAL APPLICATION: SINGLE-SUPPLY, HIGH-SIDE FIGURE 2. VOS SHIFT vs HIGH DOSE RATE RADIATION CURRENT SENSE AMPLIFIER FN8411 Rev.4.00 Page 1 of 25 Jul 6, 2017 Document Outline Related Literature Features Applications Table of Contents Pin Configuration Pin Descriptions Ordering Information Absolute Maximum Ratings Thermal Information Recommended Operating Conditions Electrical Specifications VS = ±18V Electrical Specifications VS = ±2.5V Electrical Specifications VS = ±1.5V Electrical Specifications VS = ±18V - Post Radiation Electrical Specifications VS = ±2.5V - Post Radiation Electrical Specifications VS = ±1.5V - Post Radiation Typical Performance Curves Post High Dose Rate Radiation Characteristics Post Low Dose Rate Radiation Characteristics Applications Information Functional Description Operating Voltage Range Input Performance Input ESD Diode Protection Output Short-Circuit Current Limiting Output Phase Reversal Power Dissipation Unused Channel Configuration Die Characteristics Die Dimensions Interface Materials Glassivation Top Metallization Backside Finish Process Assembly Related Information Substrate Potential Additional Information Worst Case Current Density Transistor Count Weight of Packaged Device Lid Characteristics Metallization Mask Layout Revision History About Intersil Package Outline Drawing