Datasheet ISL70444SEH (Intersil) - 3

制造商Intersil
描述19MHz Radiation Hardened 40V Quad Rail-to-Rail Input - Output, Low-Power Operational Amplifiers
页数 / 页25 / 3 — OUTA. OUTD. -IN. - +. + -. +INA. +IND. V +. V -. +IN. OUT. 600Ω. IN-. …
修订版2017-12-21
文件格式/大小PDF / 2.0 Mb
文件语言英语

OUTA. OUTD. -IN. - +. + -. +INA. +IND. V +. V -. +IN. OUT. 600Ω. IN-. IN+. CIRCUIT 1. CIRCUIT 2. CIRCUIT 3

OUTA OUTD -IN - + + - +INA +IND V + V - +IN OUT 600Ω IN- IN+ CIRCUIT 1 CIRCUIT 2 CIRCUIT 3

该数据表的模型线

文件文字版本

ISL70444SEH Pin Configuration ISL70444SEH (14 LD FLATPACK) TOP VIEW
OUTA 1 14 OUTD -IN 2 A D A 13 -IN - + + - D +INA 3 12 +IND V + 4 11 V - +IN 5 10 +IN B C - + + - -IN 6 B C 9 -IN B C OUT 7 8 OUT B C
Pin Descriptions PIN NUMBER PIN NAME EQUIVALENT ESD CIRCUIT DESCRIPTION 1 OUTA Circuit 2 Amplifier A output 2 -INA Circuit 1 Amplifier A inverting input 3 +INA Circuit 1 Amplifier A non-inverting input 4 V+ Circuit 3 Positive power supply 5 +INB Circuit 1 Amplifier B non-inverting input 6 -INB Circuit 1 Amplifier B inverting input 7 OUTB Circuit 2 Amplifier B output 8 OUTC Circuit 2 Amplifier C output 9 -INC Circuit 1 Amplifier C inverting input 10 +INC Circuit 1 Amplifier C non-inverting input 11 V- Circuit 3 Negative power supply 12 +IND Circuit 1 Amplifier D non-inverting input 13 -IND Circuit 1 Amplifier D inverting input 14 OUTD Circuit 2 Amplifier D output - E-Pad None E-Pad under package (Unbiased, tied to package lid)
V+ V+ V+ 600Ω 600Ω
CAPACITIVELY
OUT IN-
TRIGGERED ESD
IN+
CLAMP
V- V- V- CIRCUIT 1 CIRCUIT 2 CIRCUIT 3
FN8411 Rev.4.00 Page 3 of 25 Jul 6, 2017 Document Outline Related Literature Features Applications Table of Contents Pin Configuration Pin Descriptions Ordering Information Absolute Maximum Ratings Thermal Information Recommended Operating Conditions Electrical Specifications VS = ±18V Electrical Specifications VS = ±2.5V Electrical Specifications VS = ±1.5V Electrical Specifications VS = ±18V - Post Radiation Electrical Specifications VS = ±2.5V - Post Radiation Electrical Specifications VS = ±1.5V - Post Radiation Typical Performance Curves Post High Dose Rate Radiation Characteristics Post Low Dose Rate Radiation Characteristics Applications Information Functional Description Operating Voltage Range Input Performance Input ESD Diode Protection Output Short-Circuit Current Limiting Output Phase Reversal Power Dissipation Unused Channel Configuration Die Characteristics Die Dimensions Interface Materials Glassivation Top Metallization Backside Finish Process Assembly Related Information Substrate Potential Additional Information Worst Case Current Density Transistor Count Weight of Packaged Device Lid Characteristics Metallization Mask Layout Revision History About Intersil Package Outline Drawing