Datasheet ISL70444SEH (Intersil) - 10
| 制造商 | Intersil |
| 描述 | 19MHz Radiation Hardened 40V Quad Rail-to-Rail Input - Output, Low-Power Operational Amplifiers |
| 页数 / 页 | 25 / 10 — 120. 300. 100. 200. µV ( E. LTAG. nA). V T E. -100. -20. OFF. -200. -40. … |
| 修订版 | 2017-12-21 |
| 文件格式/大小 | PDF / 2.0 Mb |
| 文件语言 | 英语 |
120. 300. 100. 200. µV ( E. LTAG. nA). V T E. -100. -20. OFF. -200. -40. -60. -300. -15. -10. COMMON MODE VOLTAGE (V). 250. IB+. IB-. (nA). 150. T N. CURRENT (nA). CURR
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文件文字版本
ISL70444SEH Typical Performance Curves Unless otherwise specified, VS ± 18V, VCM = 0, VO = 0V, TA = +25°C.
120 300 100 ) 200 80 µV ( E 60 100 40 LTAG nA) O ( 0 20
S
V T E
I BIA
0 S -100 -20 OFF -200 -40 -60 -300 -20 -15 -10 -5 0 5 10 15 20 -20 -15 -10 -5 0 5 10 15 20 COMMON MODE VOLTAGE (V) COMMON MODE VOLTAGE (V)
FIGURE 3. OFFSET VOLTAGE vs COMMON-MODE VOLTAGE FIGURE 4. IBIAS vs COMMON-MODE VOLTAGE
300 250 IB+ 250 200 200 IB+ IB- (nA) 150 T N 150 E 100 100 IB- CURRENT (nA) CURR 50 50 0 0 -100 -50 0 50 100 150 -100 -50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C)
FIGURE 5. IBIAS vs TEMPERATURE (VS = ±18V) FIGURE 6. IBIAS vs TEMPERATURE (VS = ±2.5V)
300 2.5 IB+ 250 2.0 200 (nA) 1.5 T (nA) IB- N I 150 NT OS E RE 1.0 100 CURR CUR 0.5 50 0 0 -100 -50 0 50 100 150 -100 -50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C)
FIGURE 7. IBIAS vs TEMPERATURE, (VS = ±1.5V
)
FIGURE 8. IOS vs TEMPERATURE (VS = ±18V) FN8411 Rev.4.00 Page 10 of 25 Jul 6, 2017 Document Outline Related Literature Features Applications Table of Contents Pin Configuration Pin Descriptions Ordering Information Absolute Maximum Ratings Thermal Information Recommended Operating Conditions Electrical Specifications VS = ±18V Electrical Specifications VS = ±2.5V Electrical Specifications VS = ±1.5V Electrical Specifications VS = ±18V - Post Radiation Electrical Specifications VS = ±2.5V - Post Radiation Electrical Specifications VS = ±1.5V - Post Radiation Typical Performance Curves Post High Dose Rate Radiation Characteristics Post Low Dose Rate Radiation Characteristics Applications Information Functional Description Operating Voltage Range Input Performance Input ESD Diode Protection Output Short-Circuit Current Limiting Output Phase Reversal Power Dissipation Unused Channel Configuration Die Characteristics Die Dimensions Interface Materials Glassivation Top Metallization Backside Finish Process Assembly Related Information Substrate Potential Additional Information Worst Case Current Density Transistor Count Weight of Packaged Device Lid Characteristics Metallization Mask Layout Revision History About Intersil Package Outline Drawing
120 300 100 ) 200 80 µV ( E 60 100 40 LTAG nA) O ( 0 20
S
V T E
I BIA
0 S -100 -20 OFF -200 -40 -60 -300 -20 -15 -10 -5 0 5 10 15 20 -20 -15 -10 -5 0 5 10 15 20 COMMON MODE VOLTAGE (V) COMMON MODE VOLTAGE (V)
FIGURE 3. OFFSET VOLTAGE vs COMMON-MODE VOLTAGE FIGURE 4. IBIAS vs COMMON-MODE VOLTAGE
300 250 IB+ 250 200 200 IB+ IB- (nA) 150 T N 150 E 100 100 IB- CURRENT (nA) CURR 50 50 0 0 -100 -50 0 50 100 150 -100 -50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C)
FIGURE 5. IBIAS vs TEMPERATURE (VS = ±18V) FIGURE 6. IBIAS vs TEMPERATURE (VS = ±2.5V)
300 2.5 IB+ 250 2.0 200 (nA) 1.5 T (nA) IB- N I 150 NT OS E RE 1.0 100 CURR CUR 0.5 50 0 0 -100 -50 0 50 100 150 -100 -50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C)
FIGURE 7. IBIAS vs TEMPERATURE, (VS = ±1.5V
)
FIGURE 8. IOS vs TEMPERATURE (VS = ±18V) FN8411 Rev.4.00 Page 10 of 25 Jul 6, 2017 Document Outline Related Literature Features Applications Table of Contents Pin Configuration Pin Descriptions Ordering Information Absolute Maximum Ratings Thermal Information Recommended Operating Conditions Electrical Specifications VS = ±18V Electrical Specifications VS = ±2.5V Electrical Specifications VS = ±1.5V Electrical Specifications VS = ±18V - Post Radiation Electrical Specifications VS = ±2.5V - Post Radiation Electrical Specifications VS = ±1.5V - Post Radiation Typical Performance Curves Post High Dose Rate Radiation Characteristics Post Low Dose Rate Radiation Characteristics Applications Information Functional Description Operating Voltage Range Input Performance Input ESD Diode Protection Output Short-Circuit Current Limiting Output Phase Reversal Power Dissipation Unused Channel Configuration Die Characteristics Die Dimensions Interface Materials Glassivation Top Metallization Backside Finish Process Assembly Related Information Substrate Potential Additional Information Worst Case Current Density Transistor Count Weight of Packaged Device Lid Characteristics Metallization Mask Layout Revision History About Intersil Package Outline Drawing