link to page 4 link to page 24 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 AD5748Data SheetSPECIFICATIONS AVDD/AVSS = ±12 V (± 10%) to ±24 V (± 10%), DVCC = 2.7 V to 5.5 V, GND = 0 V. IOUT: RLOAD = 300 Ω. All specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter 1MinTypMaxUnitTest Conditions/Comments INPUT VOLTAGE RANGE Output unloaded VIN 0 to 4.096 V Input Leakage Current −1 +1 µA REFERENCE INPUT Reference Input Voltage 4.096 V External reference needs to be exactly as stated; otherwise, accuracy errors show up as error in output Input Leakage Current −1 +1 µA VOLTAGE OUTPUT, VOUT Output Voltage Ranges 0 5 V 0 10.5 V AVDD must have minimum 1.3 V headroom −10.5 +10.5 V AVDD/AVSS must have minimum 1.3 V headroom Accuracy Total Unadjusted Error (TUE) 2 −0.3 +0.3 % FSR −0.1 ±0.05 +0.1 % FSR TA = 25°C Relative Accuracy (INL) −0.02 ±0.005 +0.02 % FSR Bipolar Zero Error (Offset at −10 +10 mV ±10.5 V range Midscale) −8 ±0.5 +8 mV TA = 25°C, ±10.5 V range Bipolar Zero Error TC 3 ±1.5 ppm FSR/°C ±10.5 V range Zero-Scale Error −10 +10 mV ±10.5 V range −8 ±0.5 +8 mV TA = 25°C, ±10.5 V range Zero-Scale Error TC3 ±1 ppm FSR/°C ±10.5 V range Zero-Scale/Offset Error −5 +5 mV 0 V to 10.5 V range −4 ±0.5 +4 mV TA = 25°C, 0 V to 10.5 V range −3 +3 mV 0 V to 5 V range −2.2 ±0.3 +2.2 mV TA = 25°C, 0 V to 5 V range Offset Error TC3 ±2 ppm FSR/°C Gain Error −0.05 +0.05 % FSR All ranges −0.04 ±0.015 +0.04 % FSR TA = 25°C Gain Error TC3 ±0.5 ppm FSR/°C Full-Scale Error −0.05 +0.05 % FSR All ranges −0.04 ±0.015 +0.04 % FSR TA = 25°C Full-Scale Error TC3 ±1.5 ppm FSR/°C VOLTAGE OUTPUT CHARACTERISTICS3 Headroom 1.3 V Output unloaded Short-Circuit Current 15 mA Load 1 kΩ Capacitive Load Stability TA = 25°C RLOAD = ∞ 1 nF RLOAD = 2 kΩ 1 nF RLOAD = ∞ 2 µF External compensation capacitor required; see the Driving Inductive Loads section DC Output Impedance 0.12 Ω 0 V to 5 V range, ¼ to ¾ Step 7 µs Specified with 2 kΩ || 220 pF, ±0.05% 0 V to 5 V range, 40 mV Input Step 4.5 µs Specified with 2 kΩ || 220 pF, ±0.05% Slew Rate 2 V/µs Specified with 2 kΩ || 220 pF Output Noise 2.5 µV rms 0.1 Hz to 10 Hz bandwidth 45.5 µV rms 100 kHz bandwidth Rev. B | Page 4 of 32 Document Outline Features Applications General Description Table of Contents Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Voltage Output Current Output Terminology Theory of Operation Software Mode Current Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of the AD5748 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Readback Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) Current Setting Resistor Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide