Datasheet ADM1041A (Analog Devices) - 5

ADM1041A nk NK LI / 5 1 2 3 4 N ALERT N N N N N / ON CMP OTP MO MO MO MO MO PSO AC_OK DC_OK CBD/ PEN SCL AC_OKLi SDA/ PS ADD0 V 5 9 18 10 16 17 16 18 17 11 12 13 14 15 P OLTAGE V ERROR AM
μ
A 70 3V LOGIC AND GPIO 1V F 25V 5V RE 5V 1. 1. V 2. ART P UP -ST T CAPTURE F RAM SO 5 1 2 3 4 N s N N N N N S) CS CBD PEN URE I/O IT D SCL PEN MO MO MO MO MO PSO G ER M E SENSE CLOCK AC_OK DC_OK A ATUS T G S (RE GIST A E T C CONFI R AL L S) . VO LOGI STERS SERI TERFACE URE F GENERAL ER CURRENT LI G TE IN CURRENT SHARE S CONTROL DIF REGI N K TOK NFI (WRI GIST E NE P OK OV RO CO R LI VOLTAGE ERROR AMP DD DD OCP OV UVP PENO AC_OK ORFE SHAREOK RESET V V PW CONTROL OCP 25V 1. K TOK AC_OK PENO ORFE F SHAREOK OCP OK OV DD DD V V P LOADVOK OV UVP 5V F 25V 2. RE 25V 1. V 1. K POWER MANAGEMENT O K R O O P REF IT EF UV INTERNAL N R E REFERENCE T EXT 5V AD REFERENCE MO IN CLAM 1. O FALS L OLTAGE SET V R S RQ SQ RQ E OV D L UVP
μ
s SET P D 20 LOAD V L SET LTAGE O IARY O HRESHO
μ
s– P V D L T
Ω Ω
L 10 SET 35k 35k AUXI HRESHO REFERENCE R LLO P R T O s PO UV UVLHI OV GNDOK IT 3 HRESHO N T 1. IN
× Ω
GROUND
Ω
SET UV CLAM MO MA gndok_di 35k 35k BAND GAP 2V 0. 0V 0V 4V 5V 2. 4. 4. –6. VOLTAGE SENSE 0V 6. 2 1 20 20 7 21 + – S – S DD S V V LS V V V GND S ( ) ER TE XX O N ET STERS N PI M SENSE FROM LOAD IO REM PI /O XX T BALE /O M LTAGE EN TALLY O T GI O P ES: L T GH V L HI ANALOG I STANDARD I A ARE DI PROGRAM THROUGH REGI NO 1. 2. 3.
05405-004 Figure 4. ADM1041A Diagram, Part 2 Rev. 0 | Page 5 of 56 Document Outline FEATURES SECONDARY-SIDE FEATURES INTERFACE AND INTERNAL FEATURES APPLICATIONS GENERAL DESCRIPTION SAMPLE APPLICATION CIRCUIT DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY THEORY OF OPERATION POWER MANAGEMENT GAIN TRIMMING AND CONFIGURATION DIFFERENTIAL REMOTE SENSE AMPLIFIER SET LOAD VOLTAGE LOAD OVERVOLTAGE (OV) LOCAL VOLTAGE SENSE LOCAL OVERVOLTAGE PROTECTION (OVP) LOCAL UNDERVOLTAGE PROTECTION (UVP) FALSE UV CLAMP VOLTAGE ERROR AMPLIFIER MAIN VOLTAGE REFERENCE CURRENT-SENSE AMPLIFIER CURRENT SENSING CURRENT-TRANSFORMER INPUT CURRENT-SENSE CALIBRATION CURRENT-LIMIT ERROR AMPLIFIER OVERCURRENT PROTECTION CURRENT SHARE CURRENT-SHARE OFFSET ISHARE DRIVE AMPLIFIER DIFFERENTIAL SENSE AMPLIFIER ISHARE ERROR AMPLIFIER ISHARE CLAMP SHARE_OK DETECTOR PULSE/ACSENSE2 PULSE ACSENSE OrFET GATE DRIVE OSCILLATOR AND TIMING GENERATORS LOGIC I/O AND MONITOR PINS CBD/ALERT MON1 MON2 PEN PSON MON3 DC_OK (POWER-OK, POWER Good, Etc.) MON4 AC_OK MON5 SMBus SERIAL PORT MICROPROCESSOR SUPPORT Interfacing Configuring for a Microprocessor BROADCASTING SMBus SERIAL INTERFACE GENERAL SMBus TIMING SMBus PROTOCOLS FOR RAM AND EEPROM SMBus Erase EEPROM Page Operations SMBus Write Operations Send Byte Write Byte/Word Block Write SMBus READ OPERATIONS Receive Byte Block Read Notes on SMBus Read Operations SMBus ALERT RESPONSE ADDRESS (ARA) SUPPORT FOR SMBus 1.1 LAYOUT CONSIDERATIONS POWER-UP AUTO-CONFIGURATION EXTENDED SMBus ADDRESSING SDA/PSONLINK SCL/AC_OKLink BACKDOOR ACCESS REGISTER LISTING DETAILED REGISTER DESCRIPTIONS MANUFACTURING DATA MICROPROCESSOR SUPPORT TEST NAME TABLE OUTLINE DIMENSIONS ORDERING GUIDE