Datasheet ADP5310 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | 3-Channel, Integrated Ultralow Power Solution with Dual Buck Regulators and Load Switch |
| 页数 / 页 | 28 / 7 — Data Sheet. ADP5310. ABSOLUTE MAXIMUM RATINGS Table 3. THERMAL … |
| 修订版 | A |
| 文件格式/大小 | PDF / 796 Kb |
| 文件语言 | 英语 |
Data Sheet. ADP5310. ABSOLUTE MAXIMUM RATINGS Table 3. THERMAL RESISTANCE. Parameter. Rating. Table 4. Thermal Resistance
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Data Sheet ADP5310 ABSOLUTE MAXIMUM RATINGS Table 3. THERMAL RESISTANCE Parameter Rating
θJA is specified for the worst-case conditions, that is, a device PVIN1, PVIN2 to PGNDx −0.3 V to +17 V soldered in a circuit board for surface-mount packages. SW1, SW2 to PGNDx −0.3 V to PVIN + 0.3 V
Table 4. Thermal Resistance
VREG to PGNDx −0.3 V to +6 V EN1, EN3, SYNC/MODE, PWRGD to −0.3 V to +17 V
Package Type θJA θJC Unit
AGND 16-Lead TSSOP_EP 39.14 2.59 °C/W FB1, FB2 to AGND −0.3 V to +6 V VOUT3 to PGNDx −0.3 V to +6 V
ESD CAUTION
PGND1, PGND2 to AGND −0.3 V to +0.3 V Storage Temperate Range −65°C to +150°C Operational Junction Temperature −40°C to +125°C Range Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 7 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATORS AND LOAD SWITCH SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATION MODES PWM Mode PSM Mode Hysteresis Mode Mode Selection ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE AND SHUTDOWN FEATURES INTERNAL LINEAR REGULATOR (VREG) OSCILLATOR AND SYNCHRONIZATION CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE POWER-GOOD FUNCTION LOAD SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR ADJUSTABLE OUTPUT VOLTAGE PROGRAMMING EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses RECOMMENDED BUCK EXTERNAL COMPONENTS CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
θJA is specified for the worst-case conditions, that is, a device PVIN1, PVIN2 to PGNDx −0.3 V to +17 V soldered in a circuit board for surface-mount packages. SW1, SW2 to PGNDx −0.3 V to PVIN + 0.3 V
Table 4. Thermal Resistance
VREG to PGNDx −0.3 V to +6 V EN1, EN3, SYNC/MODE, PWRGD to −0.3 V to +17 V
Package Type θJA θJC Unit
AGND 16-Lead TSSOP_EP 39.14 2.59 °C/W FB1, FB2 to AGND −0.3 V to +6 V VOUT3 to PGNDx −0.3 V to +6 V
ESD CAUTION
PGND1, PGND2 to AGND −0.3 V to +0.3 V Storage Temperate Range −65°C to +150°C Operational Junction Temperature −40°C to +125°C Range Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 7 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATORS AND LOAD SWITCH SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATION MODES PWM Mode PSM Mode Hysteresis Mode Mode Selection ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE AND SHUTDOWN FEATURES INTERNAL LINEAR REGULATOR (VREG) OSCILLATOR AND SYNCHRONIZATION CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE POWER-GOOD FUNCTION LOAD SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR ADJUSTABLE OUTPUT VOLTAGE PROGRAMMING EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses RECOMMENDED BUCK EXTERNAL COMPONENTS CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE