Datasheet ADP5310 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 3-Channel, Integrated Ultralow Power Solution with Dual Buck Regulators and Load Switch |
| 页数 / 页 | 28 / 8 — ADP5310. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. PVIN1. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 796 Kb |
| 文件语言 | 英语 |
ADP5310. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. PVIN1. 16 SW1. PVIN2. PGND1. EN1. SW2. FB1. TOP VIEW. PGND2. (Not to Scale)
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文件文字版本
ADP5310 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PVIN1 1 16 SW1 PVIN2 2 15 PGND1 NC 3 14 EN1 SW2 4 ADP5310 13 FB1 TOP VIEW PGND2 5 12 (Not to Scale) PWRGD FB2 6 11 SYNC/MODE VOUT3 7 10 VREG 8 9 EN3 AGND NOTES 1. NC = NO CONNECT. 2. SOLDER THE EXPOSED PAD TO A LARGE EXTERNAL
003
COPPER GROUND PLANE UNDERNEATH THE IC FOR THERMAL DISSIPATION.
13008- Figure 3. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 PVIN1 Power Input of Channel 1. This pin must be connected to PVIN2. 2 PVIN2 Power Input of Channel 2 and Internal Linear Regulator. 3 NC No Connect. This pin is not internal y connected. Leave this pin floating. 4 SW2 Switching Node Output of Channel 2. 5 PGND2 Power Ground of Channel 2. 6 FB2 Feedback Sensing Input of Channel 2. 7 VOUT3 Power Output of Channel 3. 8 EN3 Enable Input of Channel 3. 9 AGND Analog Ground. 10 VREG Output of the Internal Linear Regulator. Connect a 1.0 µF ceramic capacitor between this pin and ground. 11 SYNC/MODE Synchronization Input Pin (SYNC). To synchronize the switching frequency of the device to an external clock, connect this pin to an external clock with a frequency from 400 kHz to 1.4 MHz. PWM or Hysteresis Mode Selection Pin of Channel 2 (MODE). When this pin is logic high, the regulator operates in PWM mode. When this pin is logic low, the regulator operates in hysteresis mode. 12 PWRGD Power-Good Signal Output. This open-drain output is the power-good signal of Channel 1. 13 FB1 Feedback Sensing Input of Channel 1. 14 EN1 Enable Input of Channel 1. 15 PGND1 Power Ground of Channel 1. 16 SW1 Switching Node Output of Channel 1. EPAD Exposed Pad. Solder the exposed pad to a large external copper ground plane underneath the IC for thermal dissipation. Rev. A | Page 8 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATORS AND LOAD SWITCH SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATION MODES PWM Mode PSM Mode Hysteresis Mode Mode Selection ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE AND SHUTDOWN FEATURES INTERNAL LINEAR REGULATOR (VREG) OSCILLATOR AND SYNCHRONIZATION CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE POWER-GOOD FUNCTION LOAD SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR ADJUSTABLE OUTPUT VOLTAGE PROGRAMMING EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses RECOMMENDED BUCK EXTERNAL COMPONENTS CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
003
COPPER GROUND PLANE UNDERNEATH THE IC FOR THERMAL DISSIPATION.
13008- Figure 3. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 PVIN1 Power Input of Channel 1. This pin must be connected to PVIN2. 2 PVIN2 Power Input of Channel 2 and Internal Linear Regulator. 3 NC No Connect. This pin is not internal y connected. Leave this pin floating. 4 SW2 Switching Node Output of Channel 2. 5 PGND2 Power Ground of Channel 2. 6 FB2 Feedback Sensing Input of Channel 2. 7 VOUT3 Power Output of Channel 3. 8 EN3 Enable Input of Channel 3. 9 AGND Analog Ground. 10 VREG Output of the Internal Linear Regulator. Connect a 1.0 µF ceramic capacitor between this pin and ground. 11 SYNC/MODE Synchronization Input Pin (SYNC). To synchronize the switching frequency of the device to an external clock, connect this pin to an external clock with a frequency from 400 kHz to 1.4 MHz. PWM or Hysteresis Mode Selection Pin of Channel 2 (MODE). When this pin is logic high, the regulator operates in PWM mode. When this pin is logic low, the regulator operates in hysteresis mode. 12 PWRGD Power-Good Signal Output. This open-drain output is the power-good signal of Channel 1. 13 FB1 Feedback Sensing Input of Channel 1. 14 EN1 Enable Input of Channel 1. 15 PGND1 Power Ground of Channel 1. 16 SW1 Switching Node Output of Channel 1. EPAD Exposed Pad. Solder the exposed pad to a large external copper ground plane underneath the IC for thermal dissipation. Rev. A | Page 8 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATORS AND LOAD SWITCH SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATION MODES PWM Mode PSM Mode Hysteresis Mode Mode Selection ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE AND SHUTDOWN FEATURES INTERNAL LINEAR REGULATOR (VREG) OSCILLATOR AND SYNCHRONIZATION CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE POWER-GOOD FUNCTION LOAD SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR ADJUSTABLE OUTPUT VOLTAGE PROGRAMMING EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses RECOMMENDED BUCK EXTERNAL COMPONENTS CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE