Datasheet ADA8282 (Analog Devices)

制造商Analog Devices
描述Radar Receive Path AFE: 4-Channel LNA and PGA
页数 / 页21 / 1 — Radar Receive Path AFE:. 4-Channel LNA and PGA. Data Sheet. ADA8282. …
文件格式/大小PDF / 517 Kb
文件语言英语

Radar Receive Path AFE:. 4-Channel LNA and PGA. Data Sheet. ADA8282. FEATURES. FUNCTIONAL BLOCK DIAGRAM

Datasheet ADA8282 Analog Devices

该数据表的模型线

文件文字版本

Radar Receive Path AFE: 4-Channel LNA and PGA Data Sheet ADA8282 FEATURES FUNCTIONAL BLOCK DIAGRAM 4 channels of low noise amplifiers (LNAs) followed by ADA8282 programmable gain amplifiers (PGAs) +INA +OUTA Minimum −3 dB bandwidth of 5 MHz 3nV√Hz LNA PGA Typical –3 dB bandwidth of 42.3 MHz –INA –OUTA Typical slew rate of 28 V/µs +24dB –6dB TO +12dB Differential input and output +INB +OUTB 3nV√Hz LNA PGA Gain of 18 dB to 36 dB in 6 dB steps –INB –OUTB Selectable low noise and low power modes +24dB –6dB TO +12dB Input referred noise of 4.5 nV/√Hz at 18.3 mW per channel +INC +OUTC Input referred noise of 3.8 nV/√Hz at 26.5 mW per channel 3nV√Hz LNA PGA Input referred noise of 3.6 nV/√Hz at 34.8 mW per channel –INC –OUTC Input referred noise of 3.4 nV/√Hz at 54.8 mW per channel +24dB –6dB TO +12dB Channel to channel gain matching of ±0.25 dB +IND +OUTD Absolute gain error of ±0.5 dB 3nV√Hz LNA PGA –IND –OUTD SPI programmable +24dB –6dB TO +12dB Power-down mode (SPI selectable) POWER GAIN 3.1 V p-p differential output swing when using a 3.3 V supply MODE SELECT 32-lead, 5 mm × 5 mm LFCSP package SPI Specified from −40°C to +125°C Qualified for automotive applications
001
CS SCLK SDI SDO VIO AVDD RESET
13132-
APPLICATIONS
Figure 1.
Automotive radar Adaptive cruise control Collision avoidance Blind spot detection Self parking Electronic bumpers GENERAL DESCRIPTION
The ADA8282 is designed for applications that require low cost, The ADA8282 can be configured in four power modes that low power, compact size, and flexibility. The ADA8282 has four trade off power and noise performance to optimize the overall parallel channels, each including an LNA and a PGA. The LNA performance according to the end application. and PGA combine to form a signal chain that features a gain range of 18 dB to 36 dB in 6 dB increments with a guaranteed Fabricated in an advanced complementary metal-oxide minimum bandwidth of 5 MHz. semiconductor (CMOS) process, the ADA8282 is available in a 5 mm × 5 mm, RoHS-compliant, 32-lead LFCSP. It is specified Using the highest power settings, the combined input referred over the automotive temperature range of −40°C to +125°C. voltage noise of the combined LNA and PGA channel is 3.4 nV/√Hz at maximum gain.
Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices . Tel: 781.329.4700 ©2015 Analog Devices, Inc. Al rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS DIGITAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION RADAR RECEIVE PATH AFE DEFAULT SPI SETTINGS INPUT IMPEDANCE POWER MODES PROGRAMMABLE GAIN RANGE OUTPUT SWING VARIATION WITH GAIN OFFSET VOLTAGE ADJUSTMENTS VIO Pin SINGLE-ENDED OR DIFFERENTIAL INPUT SHORT-CIRCUIT CURRENTS SPI INTERFACE CHANNEL TO CHANNEL PHASE MATCHING APPLICATIONS INFORMATION INCREASED GAIN USING TWO ADA8282 DEVICES IN SERIES MULTIPLEXING INPUTS USING MULTIPLE ADA8282 DEVICES BASIC CONNECTIONS FOR A TYPICAL APPLICATION REGISTER MAP REGISTER SUMMARY REGISTER DETAILS Register 0x00: Interface Configuration Register Register 0x01: Soft Reset Register Register 0x04: Chip ID Low Register Register 0x05: Chip ID High Register Register 0x06: Revision Register Register 0x10: LNA Offset 0 Register Register 0x11: LNA Offset 1 Register Register 0x12: LNA Offset 2 Register Register 0x13: LNA Offset 3 Register Register 0x14: PGA Bias Register Register 0x15: PGA Gain Register Register 0x17: Enable Channel Register Register 0x18: Enable Bias Generator Register Register 0x1D: GPIO Write Register Register 0x1E: GPIO Read Register OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS