Datasheet ADP5071 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 2 A/1.2 A DC-to-DC Switching Regulator with Independent Positive and Negative Outputs |
| 页数 / 页 | 27 / 9 — Data Sheet. ADP5071. 100. NCY. ICI. IN = 3.3V, 1.2MHz. VIN = 3.3V, … |
| 修订版 | E |
| 文件格式/大小 | PDF / 1.0 Mb |
| 文件语言 | 英语 |
Data Sheet. ADP5071. 100. NCY. ICI. IN = 3.3V, 1.2MHz. VIN = 3.3V, 1.2MHz. VIN = 3.3V, 2.4MHz. VIN = 5V, 1.2MHz. VIN = 5V, 2.4MHz. 0.001
该数据表的模型线
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Data Sheet ADP5071 100 100 80 80 %) %) ( 60 ( 60 NCY NCY E E ICI ICI F 40 F 40 F F E E 20 V 20 IN = 3.3V, 1.2MHz VIN = 3.3V, 1.2MHz VIN = 3.3V, 2.4MHz VIN = 3.3V, 2.4MHz VIN = 5V, 1.2MHz VIN = 5V, 1.2MHz VIN = 5V, 2.4MHz VIN = 5V, 2.4MHz 0 0 0.001 0.01 0.1 1
009
0.001 0.01 0.1 1
012
LOAD (A) LOAD (A)
12069- 12069- Figure 10. Boost Regulator Efficiency vs. Current Load, VPOS = 9 V, TA = 25°C Figure 13. Inverting Regulator Efficiency vs. Current Load, VNEG = −9 V, TA = 25°C
100 100 80 80 %) %) ( 60 ( 60 NCY NCY E E ICI ICI F 40 F 40 F F E E 20 V 20 IN = 3.3V, 1.2MHz VIN = 3.3V, 1.2MHz VIN = 3.3V, 2.4MHz VIN = 3.3V, 2.4MHz VIN = 5V, 1.2MHz VIN = 5V, 1.2MHz VIN = 5V, 2.4MHz VIN = 5V, 2.4MHz 0 0 0.001 0.01 0.1 1
010
0.001 0.01 0.1 1
013
LOAD (A)
12069-
LOAD (A)
12069- Figure 11. Boost Regulator Efficiency vs. Current Load, VPOS = 15 V, Figure 14. Inverting Regulator Efficiency vs. Current Load, VNEG = −15 V, TA = 25°C TA = 25°C
100 100 80 80 %) %) ( 60 ( 60 NCY NCY E E ICI ICI F 40 F 40 F F E E 20 20 VIN = 5V, 1.2MHz VIN = 5V, 1.2MHz VIN = 5V, 2.4MHz VIN = 5V, 2.4MHz 0
1
0
1
0.001 0.01 0.1 1
0
0.001 0.01 0.1 1
014
LOAD (A)
12069-
LOAD (A)
12069- Figure 12. Boost Regulator Efficiency vs. Current Load, VPOS = 34 V, Figure 15. Inverting Regulator Efficiency vs. Current Load, VNEG = −34 V, TA = 25°C TA = 25°C Rev. E | Page 9 of 27 Document Outline Features Applications Typical Application Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation PWM Mode PSM Mode Undervoltage Lockout (UVLO) Oscillator and Synchronization Internal Regulators Precision Enabling Soft Start Slew Rate Control Current-Limit Protection Overvoltage Protection Thermal Shutdown Start-Up Sequence Applications Information ADIsimPower Design Tool Component Selection Feedback Resistors Output Capacitors Input Capacitor VREG Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator Loop Compensation Boost Regulator Inverting Regulator Common Applications Super Low Noise With Optional LDOs SEPIC Step-Up/Step-Down Operation Layout Considerations Outline Dimensions Ordering Guide
009
0.001 0.01 0.1 1
012
LOAD (A) LOAD (A)
12069- 12069- Figure 10. Boost Regulator Efficiency vs. Current Load, VPOS = 9 V, TA = 25°C Figure 13. Inverting Regulator Efficiency vs. Current Load, VNEG = −9 V, TA = 25°C
100 100 80 80 %) %) ( 60 ( 60 NCY NCY E E ICI ICI F 40 F 40 F F E E 20 V 20 IN = 3.3V, 1.2MHz VIN = 3.3V, 1.2MHz VIN = 3.3V, 2.4MHz VIN = 3.3V, 2.4MHz VIN = 5V, 1.2MHz VIN = 5V, 1.2MHz VIN = 5V, 2.4MHz VIN = 5V, 2.4MHz 0 0 0.001 0.01 0.1 1
010
0.001 0.01 0.1 1
013
LOAD (A)
12069-
LOAD (A)
12069- Figure 11. Boost Regulator Efficiency vs. Current Load, VPOS = 15 V, Figure 14. Inverting Regulator Efficiency vs. Current Load, VNEG = −15 V, TA = 25°C TA = 25°C
100 100 80 80 %) %) ( 60 ( 60 NCY NCY E E ICI ICI F 40 F 40 F F E E 20 20 VIN = 5V, 1.2MHz VIN = 5V, 1.2MHz VIN = 5V, 2.4MHz VIN = 5V, 2.4MHz 0
1
0
1
0.001 0.01 0.1 1
0
0.001 0.01 0.1 1
014
LOAD (A)
12069-
LOAD (A)
12069- Figure 12. Boost Regulator Efficiency vs. Current Load, VPOS = 34 V, Figure 15. Inverting Regulator Efficiency vs. Current Load, VNEG = −34 V, TA = 25°C TA = 25°C Rev. E | Page 9 of 27 Document Outline Features Applications Typical Application Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation PWM Mode PSM Mode Undervoltage Lockout (UVLO) Oscillator and Synchronization Internal Regulators Precision Enabling Soft Start Slew Rate Control Current-Limit Protection Overvoltage Protection Thermal Shutdown Start-Up Sequence Applications Information ADIsimPower Design Tool Component Selection Feedback Resistors Output Capacitors Input Capacitor VREG Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator Loop Compensation Boost Regulator Inverting Regulator Common Applications Super Low Noise With Optional LDOs SEPIC Step-Up/Step-Down Operation Layout Considerations Outline Dimensions Ordering Guide