Datasheet STUSB4500L (STMicroelectronics) - 4

STUSB4500L Pinout Table 1. Pin function list QFN CSP Name Type Description Typical connection
1 B4 CC1DB HV AIO Dead battery enable on CC1 pin To CC1 pin if used or ground 2 B5 CC1 HV AIO Type-C configuration channel 1 To Type-C receptacle A5 3 B3, C3 NU - - To ground 4 C5 CC2 HV AIO Type-C configuration channel 2 To Type-C receptacle B5 5 C4 CC2DB HV AIO Dead battery enable on CC2 pin To CC2 pin if used or ground 6 D4 RESET DI Reset input, active high From system 7 D5 SCL DI I2C clock input To I²C master, ext. pull-up or floating (if not used 8 E5 SDA DI/OD I2C data input/output, active low open drain To I²C master, ext. pull-up or floating (if not used Internal discharge path or external From power system (internal discharge path enable, active low open path) or to the discharge path 9 E4 DISCH HV AI/OD drain switch (external path), ext. pull- up 10 E3 GND GND Ground Ground Attachment detection, active low open To MCU if any, ext. pull-up 11 E2 ATTACH OD drain I²C device address setting Static, to ground or ext. pull-up for address selection, 12 D3 ADDR0 DI to ground if no connection to MCU I²C device address setting Static, to ground or ext. pull-up for address selection, 13 D2 ADDR1 DI to ground if no connection to MCU 14 E1 RP_1A5 OD 1.5 A source flag, active low open drain To power system, ext. pull-up General purpose output, active low open To system, ext. pull-up 15 D1 GPIO OD drain V To power switch or to power 16 C1 VBUS_EN_SNK HV OD BUS sink power path enable, active low open drain system, ext. pull-up Cable orientation, active low open drain USB super speed MUX select, 17 C2 A_B_SIDE OD ext. pull-up V From V 18 A1 VBUS_VS_DISCH HV AI BUS voltage monitoring and discharge BUS, receptacle side path 19 B2 ALERT OD I2C interrupt, active low open drain To I²C master, ext. pull-up 3 A source flag, active low open drain To power switch or to power 20 A2 RP_3A HV OD system, ext. pull-up 21 A3 VREG_1V2 PWR 1.2 V internal regulator output 1 µF typ. decoupling capacitor Power supply from system From power system, connect 22 B1 VSYS PWR to ground if not used 23 A4 VREG_2V7 PWR 2.7 V internal regulator output 1 µF typ. decoupling capacitor 24 A5 VDD HV PWR Power supply from USB power line From VBUS, receptacle side EP - EP GND Exposed pad is connected to ground To ground
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Document Outline Cover image Product status link / summary Product status link / summary Features Applications Description 1 Functional description 1.1 Block overview 2 Inputs/outputs 2.1 Pinout 2.2 Pin description 2.2.1 CC1 / CC2 2.2.2 CC1DB / CC2DB 2.2.3 RESET 2.2.4 I²C interface pins 2.2.5 DISCH 2.2.6 GND 2.2.7 ATTACH 2.2.8 RP_3A/RP_1A5 2.2.9 GPIO 2.2.10 VBUS_EN_SNK 2.2.11 A_B_SIDE 2.2.12 VBUS_VS_DISCH 2.2.13 VREG_1V2 2.2.14 VSYS 2.2.15 VREG_2V7 2.2.16 VDD 3 Description of the features 3.1 CC interface 3.2 VBUS power path control 3.2.1 VBUS monitoring 3.2.2 VBUS discharge 3.2.3 VBUS power path assertion 3.3 Dead battery mode 3.4 High voltage protections 3.5 Hardware fault management 3.6 Debug accessory mode detection 4 I²C Interface 4.1 Read and write operations 4.2 Timing specifications 5 Start-up configuration 5.1 User-defined parameters 5.2 Default start-up configuration 6 Application 6.1 General information 6.1.1 Power supplies 6.1.2 Connection to MCU or application processor 6.2 Typical application 7 Electrical characteristics 7.1 Absolute maximum ratings 7.2 Operating conditions 7.3 Electrical and timing characteristics 8 Package information 8.1 QFN-24 EP (4x4) package information 8.2 WLCSP (2.6x2.6x0.5) 25 bumps package information 8.3 Thermal information 9 Terms and abbreviations Revision history