Datasheet PHK12NQ03LT (Nexperia) - 10
| 制造商 | Nexperia |
| 描述 | N-channel TrenchMOS logic level FET |
| 页数 / 页 | 13 / 10 — Philips Semiconductors. PHK12NQ03LT. N-channel TrenchMOS™ logic level … |
| 修订版 | 01032004 |
| 文件格式/大小 | PDF / 212 Kb |
| 文件语言 | 英语 |
Philips Semiconductors. PHK12NQ03LT. N-channel TrenchMOS™ logic level FET. Package outline
该数据表的模型线
文件文字版本
Philips Semiconductors PHK12NQ03LT N-channel TrenchMOS™ logic level FET 7. Package outline SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
D E A X c y HE v M A Z 8 5 Q A2 (A ) A A 3 1 pin 1 index θ L p L 1 4 e w M detail X b p 0 2.5 5 mm scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT
θ
max. A1 A2 A3 bp c D(1) E(2) (1) e HE L Lp Q v w y Z
0.25 1.45 0.49 0.25 5.0 4.0 6.2 1.0 0.7 0.7 mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1 0.10 1.25 0.36 0.19 4.8 3.8 5.8 0.4 0.6 0.3 8o 0o 0.010 0.057 0.019 0.0100 0.20 0.16 0.244 0.039 0.028 0.028 inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004 0.004 0.049 0.014 0.0075 0.19 0.15 0.228 0.016 0.024 0.012
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES OUTLINE EUROPEAN ISSUE DATE VERSION PROJECTION IEC JEDEC JEITA
99-12-27 SOT96-1 076E03 MS-012 03-02-18
Fig 14. SOT96-1 (SO8).
9397 750 12955 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 02 March 2004 9 of 12
Document Outline 1. Product profile 1.1 Description 1.2 Features 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 5.1 Transient thermal impedance 6. Characteristics 7. Package outline 8. Revision history 9. Data sheet status 10. Definitions 11. Disclaimers 12. Trademarks
D E A X c y HE v M A Z 8 5 Q A2 (A ) A A 3 1 pin 1 index θ L p L 1 4 e w M detail X b p 0 2.5 5 mm scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT
θ
max. A1 A2 A3 bp c D(1) E(2) (1) e HE L Lp Q v w y Z
0.25 1.45 0.49 0.25 5.0 4.0 6.2 1.0 0.7 0.7 mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1 0.10 1.25 0.36 0.19 4.8 3.8 5.8 0.4 0.6 0.3 8o 0o 0.010 0.057 0.019 0.0100 0.20 0.16 0.244 0.039 0.028 0.028 inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004 0.004 0.049 0.014 0.0075 0.19 0.15 0.228 0.016 0.024 0.012
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES OUTLINE EUROPEAN ISSUE DATE VERSION PROJECTION IEC JEDEC JEITA
99-12-27 SOT96-1 076E03 MS-012 03-02-18
Fig 14. SOT96-1 (SO8).
9397 750 12955 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 02 March 2004 9 of 12
Document Outline 1. Product profile 1.1 Description 1.2 Features 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 5.1 Transient thermal impedance 6. Characteristics 7. Package outline 8. Revision history 9. Data sheet status 10. Definitions 11. Disclaimers 12. Trademarks