Datasheet ADN8834 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | Ultra compact 1.5 A Thermoelectric Cooler (TEC) Controller |
| 页数 / 页 | 27 / 8 — ADN8834. Data Sheet. TYPICAL PERFORMANCE CHARACTERISTICS. 100. VIN = … |
| 修订版 | B |
| 文件格式/大小 | PDF / 978 Kb |
| 文件语言 | 英语 |
ADN8834. Data Sheet. TYPICAL PERFORMANCE CHARACTERISTICS. 100. VIN = 3.3V. IN = 5V. FFIC. LOAD = 2Ω. LOAD = 3Ω. LOAD = 4Ω. LOAD = 5Ω. 0.5. 1.0
该数据表的模型线
文件文字版本
ADN8834 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
100 100 VIN = 3.3V V 90 IN = 5V 90 80 80 70 70 %) %) ( 60 ( 60 Y Y C C N 50 N 50 IE IE 40 FFIC 40 FFIC E E 30 30 20 20 LOAD = 2Ω LOAD = 3Ω 10 10 LOAD = 4Ω LOAD = 5Ω 0 0 0 0.5 1.0 1.5
003
0 1.5
106
0.5 1.0 TEC CURRENT (A) TEC CURRENT (A)
12954- 12954- Figure 4. Efficiency vs. TEC Current at VIN = 3.3 V and 5 V in Cooling Mode Figure 7. Efficiency vs. TEC Current at VIN = 3.3 V with Different Loads in with 2 Ω Load Heating Mode
100 VIN = 3.3V V 1.4 90 IN = 5V 80 1.2 A) ( 70 NT 1.0 %) ( 60 Y C 0.8 N 50 C CURRE IE E T 40 0.6 FFIC UM E IM 30 AX 0.4 M 20 LOAD = 2Ω 0.2 LOAD = 3Ω 10 LOAD = 4Ω LOAD = 5Ω 0 0 0 0.5 1.0 1.5 2.7 3.0 3.5 4.0 4.5 5.0 5.5
004 107
TEC CURRENT (A) INPUT VOLTAGE AT PVIN (V)
12954- 12954- Figure 5. Efficiency vs. TEC Current at VIN = 3.3 V and 5 V in Heating Mode Figure 8. Maximum TEC Current vs. Input Voltage at PVIN (VIN = 3.3 V), with 2 Ω Load Without Voltage and Current Limit in Cooling Mode
100 1.4 90 80 1.2 A) ( 70 NT 1.0 (%) 60 0.8 NCY 50 C CURRE E E CI T F F 40 0.6 E UM IM 30 AX 0.4 M 20 LOAD = 2Ω LOAD = 2Ω LOAD = 3Ω 0.2 LOAD = 3Ω 10 LOAD = 4Ω LOAD = 4Ω LOAD = 5Ω LOAD = 5Ω 0 0
105
0 0.5 1.0 1.5 2.7 3.0 3.5 4.0 4.5 5.0 5.5
108
TEC CURRENT (A)
12954-
INPUT VOLTAGE AT PVIN (V)
12954- Figure 6. Efficiency vs. TEC Current at VIN = 3.3 V with Different Loads in Figure 9. Maximum TEC Current vs. Input Voltage at PVIN (VIN = 3.3 V), Cooling Mode Without Voltage and Current Limit in Heating Mode Rev. B | Page 8 of 27 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Detailed Functional Block Diagram Theory of Operation Analog PID Control Digital PID Control Powering the Controller Enable and Shutdown Oscillator Clock Frequency External Clock Operation Connecting Multiple ADN8834 Devices Temperature Lock Indicator (LFCSP Only) Soft Start on Power-Up TEC Voltage/Current Monitor Voltage Monitor Current Monitor Maximum TEC Voltage Limit Using a Resistor Divider to Set the TEC Voltage Limit Maximum TEC Current Limit Using a Resistor Divider to Set the TEC Current Limit Applications Information Signal Flow Thermistor Setup Thermistor Amplifier (Chopper 1) PID Compensation Amplifier (Chopper 2) MOSFET Driver Amplifiers PWM Output Filter Requirements Inductor Selection Capacitor Selection Input Capacitor Selection Power Dissipation PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Linear Regulator Power Dissipation PCB Layout Guidelines Block Diagrams and Signal Flow Guidelines for Reducing Noise and Minimizing Power Loss General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components Example PCB Layout Using Two Layers Outline Dimensions Ordering Guide
TA = 25°C, unless otherwise noted.
100 100 VIN = 3.3V V 90 IN = 5V 90 80 80 70 70 %) %) ( 60 ( 60 Y Y C C N 50 N 50 IE IE 40 FFIC 40 FFIC E E 30 30 20 20 LOAD = 2Ω LOAD = 3Ω 10 10 LOAD = 4Ω LOAD = 5Ω 0 0 0 0.5 1.0 1.5
003
0 1.5
106
0.5 1.0 TEC CURRENT (A) TEC CURRENT (A)
12954- 12954- Figure 4. Efficiency vs. TEC Current at VIN = 3.3 V and 5 V in Cooling Mode Figure 7. Efficiency vs. TEC Current at VIN = 3.3 V with Different Loads in with 2 Ω Load Heating Mode
100 VIN = 3.3V V 1.4 90 IN = 5V 80 1.2 A) ( 70 NT 1.0 %) ( 60 Y C 0.8 N 50 C CURRE IE E T 40 0.6 FFIC UM E IM 30 AX 0.4 M 20 LOAD = 2Ω 0.2 LOAD = 3Ω 10 LOAD = 4Ω LOAD = 5Ω 0 0 0 0.5 1.0 1.5 2.7 3.0 3.5 4.0 4.5 5.0 5.5
004 107
TEC CURRENT (A) INPUT VOLTAGE AT PVIN (V)
12954- 12954- Figure 5. Efficiency vs. TEC Current at VIN = 3.3 V and 5 V in Heating Mode Figure 8. Maximum TEC Current vs. Input Voltage at PVIN (VIN = 3.3 V), with 2 Ω Load Without Voltage and Current Limit in Cooling Mode
100 1.4 90 80 1.2 A) ( 70 NT 1.0 (%) 60 0.8 NCY 50 C CURRE E E CI T F F 40 0.6 E UM IM 30 AX 0.4 M 20 LOAD = 2Ω LOAD = 2Ω LOAD = 3Ω 0.2 LOAD = 3Ω 10 LOAD = 4Ω LOAD = 4Ω LOAD = 5Ω LOAD = 5Ω 0 0
105
0 0.5 1.0 1.5 2.7 3.0 3.5 4.0 4.5 5.0 5.5
108
TEC CURRENT (A)
12954-
INPUT VOLTAGE AT PVIN (V)
12954- Figure 6. Efficiency vs. TEC Current at VIN = 3.3 V with Different Loads in Figure 9. Maximum TEC Current vs. Input Voltage at PVIN (VIN = 3.3 V), Cooling Mode Without Voltage and Current Limit in Heating Mode Rev. B | Page 8 of 27 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Detailed Functional Block Diagram Theory of Operation Analog PID Control Digital PID Control Powering the Controller Enable and Shutdown Oscillator Clock Frequency External Clock Operation Connecting Multiple ADN8834 Devices Temperature Lock Indicator (LFCSP Only) Soft Start on Power-Up TEC Voltage/Current Monitor Voltage Monitor Current Monitor Maximum TEC Voltage Limit Using a Resistor Divider to Set the TEC Voltage Limit Maximum TEC Current Limit Using a Resistor Divider to Set the TEC Current Limit Applications Information Signal Flow Thermistor Setup Thermistor Amplifier (Chopper 1) PID Compensation Amplifier (Chopper 2) MOSFET Driver Amplifiers PWM Output Filter Requirements Inductor Selection Capacitor Selection Input Capacitor Selection Power Dissipation PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Linear Regulator Power Dissipation PCB Layout Guidelines Block Diagrams and Signal Flow Guidelines for Reducing Noise and Minimizing Power Loss General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components Example PCB Layout Using Two Layers Outline Dimensions Ordering Guide