Datasheet ADCMP606, ADCMP607 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparator in a 12-lead LSCFP Package |
| 页数 / 页 | 14 / 9 — Data Sheet. ADCMP606/ADCMP607. 1.4. PROPAGATION DELAY FALL ns. 5.550V. s) … |
| 修订版 | C |
| 文件格式/大小 | PDF / 375 Kb |
| 文件语言 | 英语 |
Data Sheet. ADCMP606/ADCMP607. 1.4. PROPAGATION DELAY FALL ns. 5.550V. s) n ( Y 1.3. A L E. N D IO T A. AG P 1.2. O R P
该数据表的模型线
文件文字版本
Data Sheet ADCMP606/ADCMP607 1.4 PROPAGATION DELAY FALL ns 5.550V Q s) n ( Y 1.3 A L E N D IO T A AG P 1.2 O R P PROPAGATION DELAY RISE ns Q
2 01
1.1
10 7-
–0.2 0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0
0
5.050V 2.000ns/DIV
7- 591 0
V
91
CM AT VCC = 2.5V
05 Figure 11. Propagation Delay vs. Input Common-Mode Voltage Figure 13. Output Waveform at VCC = 5.5 V
2.550V Q Q
1 -01
2.050V 2.000ns/DIV
917 5 0 Figure 12 .Output Waveform at VCC = 2.5 V Rev. C | Page 9 of 14 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING CML-COMPATIBLE OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINTS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
2 01
1.1
10 7-
–0.2 0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0
0
5.050V 2.000ns/DIV
7- 591 0
V
91
CM AT VCC = 2.5V
05 Figure 11. Propagation Delay vs. Input Common-Mode Voltage Figure 13. Output Waveform at VCC = 5.5 V
2.550V Q Q
1 -01
2.050V 2.000ns/DIV
917 5 0 Figure 12 .Output Waveform at VCC = 2.5 V Rev. C | Page 9 of 14 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING CML-COMPATIBLE OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINTS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE